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-rw-r--r--include/asm-arm/arch-imx/imx-uart.h10
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h7
-rw-r--r--include/asm-arm/arch-ixp4xx/memory.h2
-rw-r--r--include/asm-arm/arch-pxa/dma.h26
-rw-r--r--include/asm-arm/bug.h1
-rw-r--r--include/asm-arm/unistd.h23
6 files changed, 48 insertions, 21 deletions
diff --git a/include/asm-arm/arch-imx/imx-uart.h b/include/asm-arm/arch-imx/imx-uart.h
new file mode 100644
index 000000000000..3a685e1780ea
--- /dev/null
+++ b/include/asm-arm/arch-imx/imx-uart.h
@@ -0,0 +1,10 @@
+#ifndef ASMARM_ARCH_UART_H
+#define ASMARM_ARCH_UART_H
+
+#define IMXUART_HAVE_RTSCTS (1<<0)
+
+struct imxuart_platform_data {
+ unsigned int flags;
+};
+
+#endif
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 942b622455bc..b59520e56fc7 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -260,6 +260,12 @@ out:
#endif
+#ifndef CONFIG_PCI
+
+#define __io(v) v
+
+#else
+
/*
* IXP4xx does not have a transparent cpu -> PCI I/O translation
* window. Instead, it has a set of registers that must be tweaked
@@ -578,6 +584,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
#define ioport_unmap(addr)
+#endif // !CONFIG_PCI
#endif // __ASM_ARM_ARCH_IO_H
diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h
index ee211d28a3ef..af9667b57ab3 100644
--- a/include/asm-arm/arch-ixp4xx/memory.h
+++ b/include/asm-arm/arch-ixp4xx/memory.h
@@ -14,7 +14,7 @@
*/
#define PHYS_OFFSET UL(0x00000000)
-#ifndef __ASSEMBLY__
+#if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h
index 3e88a2a02a0f..a008150abc59 100644
--- a/include/asm-arm/arch-pxa/dma.h
+++ b/include/asm-arm/arch-pxa/dma.h
@@ -24,27 +24,29 @@ typedef struct pxa_dma_desc {
volatile u32 dcmd; /* DCMD value for the current transfer */
} pxa_dma_desc;
+typedef enum {
+ DMA_PRIO_HIGH = 0,
+ DMA_PRIO_MEDIUM = 1,
+ DMA_PRIO_LOW = 2
+} pxa_dma_prio;
+
#if defined(CONFIG_PXA27x)
#define PXA_DMA_CHANNELS 32
-#define PXA_DMA_NBCH(prio) ((prio == DMA_PRIO_LOW) ? 16 : 8)
-typedef enum {
- DMA_PRIO_HIGH = 0,
- DMA_PRIO_MEDIUM = 8,
- DMA_PRIO_LOW = 16
-} pxa_dma_prio;
+#define pxa_for_each_dma_prio(ch, prio) \
+for ( \
+ ch = prio * 4; \
+ ch != (4 << prio) + 16; \
+ ch = (ch + 1 == (4 << prio)) ? (prio * 4 + 16) : (ch + 1) \
+)
#elif defined(CONFIG_PXA25x)
#define PXA_DMA_CHANNELS 16
-#define PXA_DMA_NBCH(prio) ((prio == DMA_PRIO_LOW) ? 8 : 4)
-typedef enum {
- DMA_PRIO_HIGH = 0,
- DMA_PRIO_MEDIUM = 4,
- DMA_PRIO_LOW = 8
-} pxa_dma_prio;
+#define pxa_for_each_dma_prio(ch, prio) \
+ for (ch = prio * 4; ch != (4 << prio); ch++)
#endif
diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h
index 0e36fd5d87df..7fb02138f585 100644
--- a/include/asm-arm/bug.h
+++ b/include/asm-arm/bug.h
@@ -1,6 +1,7 @@
#ifndef _ASMARM_BUG_H
#define _ASMARM_BUG_H
+#include <linux/config.h>
#ifdef CONFIG_BUG
#ifdef CONFIG_DEBUG_BUGVERBOSE
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index a5896d94e1ad..1e891f860ef3 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -361,7 +361,7 @@
/*
* The following syscalls are obsolete and no longer available for EABI.
*/
-#if defined(__ARM_EABI__)
+#if defined(__ARM_EABI__) && !defined(__KERNEL__)
#undef __NR_time
#undef __NR_umount
#undef __NR_stime
@@ -411,7 +411,8 @@ type name(void) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : __SYS_REG_LIST() ); \
+ : __SYS_REG_LIST() \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -425,7 +426,8 @@ type name(type1 arg1) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : __SYS_REG_LIST( "0" (__r0) ) ); \
+ : __SYS_REG_LIST( "0" (__r0) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -440,7 +442,8 @@ type name(type1 arg1,type2 arg2) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -457,7 +460,8 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -475,7 +479,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
__asm__ __volatile__ ( \
__syscall(name) \
: "=r" (__res_r0) \
- : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \
+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -495,7 +500,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
__syscall(name) \
: "=r" (__res_r0) \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
- "r" (__r3), "r" (__r4) ) ); \
+ "r" (__r3), "r" (__r4) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
@@ -515,7 +521,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
__syscall(name) \
: "=r" (__res_r0) \
: __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
- "r" (__r3), "r" (__r4), "r" (__r5) ) ); \
+ "r" (__r3), "r" (__r4), "r" (__r5) ) \
+ : "memory" ); \
__res = __res_r0; \
__syscall_return(type,__res); \
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-07 17:26:06 +0000