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2016-03-22edac: arm64: Check for ECC errors on panicRohit Vaswani
Check for ecc errors on panic on all processors Change-Id: I2a68644afb2730a69aca35abb1f10899a11514dd Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> [stepanm@codeaurora.org: update argument to arm64_check_cache_ecc()] Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> [satyap: trivial merge conflict resolution] Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2016-03-22arm64: Fix conflict resolution in cpuinfo CPU reportingStepan Moskovchenko
Commit ebc4e05c338bde49382c7c46ce6b8a371713862e ("arm64: show present cpu instead of online cpu in /proc/cpuinfo") did not have its conflicts against msm-3.18 properly resolved. Change-Id: I1f4eb1d8a20b2bc142a7f0b8890d383a9552557c Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> [satyap: trivial merge conflict resolution and move changes in arch/arm64/kernel from setup.c to cpuinfo.c to align with kernel 4.4] Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2016-03-22ARM/ARM64: Introduce arch_read_hardware_idAbhimanyu Kapur
Moving towards device tree and arm single binary refering to machine descriptor name for hardware id information under /proc/cpuinfo is not suitable for certain soc vendors. Add a hook for soc vendors to supply a per-soc hardware read method. Change-Id: Ifcccdffa3c0e1e8b5f96837eb1c023e468d4c287 Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> [satyap: trivial merge conflict resolution and move changes in arch/arm64/kernel from setup.c to cpuinfo.c to align with kernel 4.4] Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2016-03-22arm64: Set CONFIG_QCOM_KGSL in the defconfigJordan Crouse
Enable the KGSL GPU driver by enabling CONFIG_QCOM_KGSL in the defconfig. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22msm: kgsl: Increase GPMU timeoutsJordan Crouse
The existing timeout values for the various GPMU interactions seems to have been a tad optimistic for all conditions. Increase them to cover measured worse case scenarios. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22msm: kgsl: Conditionally use bwmon governor if it existsJordan Crouse
Wrap the code to use the bwmon governor or not depending if it exists. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22msm: kgsl: Update various exernal APIs for the 4.4 kernelJordan Crouse
Make several changes to build the GPU driver for 4.4: - Rename CONFIG_MSM to CONFIG_QCOM where applicable - Add msm_kgsl.h to the Kbuild exports - Remove linux/coresight_of.h (as it has been merged into coresight.h) and remove the .owner member of the coresight_desc struct. - Use the new location for the sync.h file (in staging) - Remove an unused sync function - Move oneshot_sync.h inside of #ifdef wrappers Signed-off-by: Jordan Crouse <jcrouse@codeauorora.org>
2016-03-22devfreq: Add Qualcomm GPU devfreq governorsJordan Crouse
Snapshot of the Qualcomm GPU devfreq governors and support as of msm-3.18 commit e70ad0cd5efd ("Promotion of kernel.lnx.3.18-151201."). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22PM / devfreq: allow governors to use devfreq_get_freq_levelJeremy Gebben
Level based governors may need to perform this lookup to interpret the current frequency of the device. Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org> Signed-off-by: Vladimir Razgulin <vrazguli@codeaurora.org>
2016-03-22msm: kgsl: Add Qualcomm GPU driverJordan Crouse
Snapshot of the Qualcom Adreno GPU driver (KGSL) as of msm-3.18 commit commit e70ad0cd5efd ("Promotion of kernel.lnx.3.18-151201."). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22coresight: of_get_coresight_platform_data needs both OF and CORESIGHTJordan Crouse
The file that defines of_get_coresight_platform_data() is indeed dependent on CONFIG_OF but the entire coresight directory depends on CONFIG_CORESIGHT so both need to be enabled to make the symbol resolve. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-22fuse: Add support for passthrough read/writeNikhilesh Reddy
Add support for filesystem passthrough read/write of files when enabled in userspace through the option FUSE_PASSTHROUGH. There are many FUSE based filesystems that perform checks or enforce policy or perform some kind of decision making in certain functions like the "open" call but simply act as a "passthrough" when performing operations such as read or write. When FUSE_PASSTHROUGH is enabled all the reads and writes to the fuse mount point go directly to the passthrough filesystem i.e a native filesystem that actually hosts the files rather than through the fuse daemon. All requests that aren't read/write still go thought the userspace code. This allows for significantly better performance on read and writes. The difference in performance between fuse and the native lower filesystem is negligible. There is also a significant cpu/power savings that is achieved which is really important on embedded systems that use fuse for I/O. Changelog: v5: Fix the check when setting the passthrough file [Found when testing by Mike Shal] v3 and v4: Use the fs_stack_depth to prevent further stacking and a minor fix [Fix suggested by Jann Horn] v2: Changed the feature name to passthrough from stacked_io [Proposed by Linus Torvalds] Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
2016-03-22iommu/arm-smmu: Add iommu_dev for dynamic attach casePatrick Daly
A new struct element was added during the kernel 4.4 upgrade. Ensure that it is set during dynamic attach. Change-Id: I0150aebe4a67728945890be2b547a6cbb9bd5306 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu: Add snapshot of qcom_iommu.hPatrick Daly
Taken as of kernel version "e70ad0cd5efdd9dc91a77dcdac31d6132e1315c1" on msm-3.18. Change-Id: I91bdb35429af8159e58bb6fb9e2e52f16d625c4b Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22defconfig: Enable IOMMU debugfs for msmPatrick Daly
Allow using the iommu debugfs files. Change-Id: I039828bdb2b5c0369a260bd8f06061d35d84bba5 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22Coresight: add support for device namesShashank Mittal
Add support to read device names from device tree entries. This allows using same names for CoreSight devices across different targets. Change-Id: Ide3da74533051db38e9a6c5904a7cab42b3be6c1 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22Coresight: change attribute names for sources and sinksShashank Mittal
Use 'enable' instead of 'enable_source' and 'curr_sink' instead of 'enable_sink attributes to align it with MSM implementation. This change ensures same device node interface for host tools between MSM and upstream Coresight driver implementation. Change-Id: I5267d2ad92e76607e0ac1bd0e9ef63c0a89cfe7f Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22coresight: add CSR driver support in upstream implementationShashank Mittal
Add CSR driver in upstream implementation of coresight driver. This change copies drivers/coresight/coresight-csr.c (commit : 90095b2a) to driver/hwtracing/coresight directory. Change-Id: Ib5408ccce868bb36230a26a8d32f463a80a4a6a5 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22coresight: tmc: add scatter-gather support for ETR deviceShashank Mittal
Add support to configure ETR device in scatter-gather mode. In scatter-gather mode trace buffer can be configured to use bigger buffer size without need of bigger contiguous memory. Change-Id: I3ce654392d2b75d24f7982638e53c2aab27d4a0e Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22coresight: tmc: add support to configure etr mem sizeShashank Mittal
Add support to expose a node for user to configure memory buffer size for an ETR device. Change-Id: Ide175ca8eeb5b9c2d7213dfff4c81b5314ce61f6 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22coresight: stm: change to amba device driverShashank Mittal
Current STM device registers itself as a platform device. Change it to an amba device driver to align it with upstream implementation of coresight devices. Change-Id: I7ff9300e3606d5ffc9a54098f7f5d4d03212fec0 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22coresight: add STM driver support in upstream implementationShashank Mittal
Add STM driver in upstream implementation of Coresight driver. This change copies drivers/coresight/coresight-stm.c (commit : 90095b2ae1d987882f67c6d4a512baa98eecd6cb) to driver/hwtracing/coresight directory. Change-Id: Id023bf85df0345205ca8baa6a97ff340d5808aeb Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-03-22iommu: Apply necessary initcall orderingPatrick Daly
Iommus do not currently support probe deferral. Ensure that they probe after gdscs. Change-Id: I693ce5ba74090a76f0442a3057fe45ff849c3fe1 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu-debug: Add proper header file for module_init()Patrick Daly
Fix compilation on 4.4 kernel. Change-Id: I760e9adb94c15263e4bf653aec2e3c63e368c2bc Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu/io-pgtable-arm: Fix IOMMU_IO_PGTABLE_LPAE_SELFTEST compilationPatrick Daly
Use the proper number of arguments to map_sg() Change-Id: I8f1d038334b0145436e7df86283482482ebca209 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu/arm-smmu: Restore __arm_smmu_get_pci_sid()Patrick Daly
This function is used upstream. Restore it. Change-Id: If828a4e3504a27b866daea9caa6d9238b362bb16 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22arm-smmu: Remove PCIE header file dependencyPatrick Daly
Until the msm pcie driver has been upgraded, remove references to its header file to allow compilation. Change-Id: I6413abfd2279a20a4c062cb04d9e0e1f1b10ce9d Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu/io-pgtable: Add module.h include filePatrick Daly
This is needed for the module_init/exit() macros. Change-Id: Ibbb757685b285c28fc8fae8cb27555dccebd9c86 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22Revert "scatterlist: use sg_phys()"Dan Williams
commit db0fa0cb0157 "scatterlist: use sg_phys()" did replacements of the form: phys_addr_t phys = page_to_phys(sg_page(s)); phys_addr_t phys = sg_phys(s) & PAGE_MASK; However, this breaks platforms where sizeof(phys_addr_t) > sizeof(unsigned long). Revert for 4.3 and 4.4 to make room for a combined helper in 4.5. Cc: <stable@vger.kernel.org> Cc: Jens Axboe <axboe@fb.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Fixes: db0fa0cb0157 ("scatterlist: use sg_phys()") Suggested-by: Joerg Roedel <joro@8bytes.org> Reported-by: Vitaly Lavrov <vel21ripn@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2016-03-22iommu: Move default domain allocation to iommu_group_get_for_dev()Joerg Roedel
Now that the iommu core support for iommu groups is not pci-centric anymore, we can move default domain allocation to the bus independent iommu_group_get_for_dev() function. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-03-22iommu: Remove is_pci_dev() fall-back from iommu_group_get_for_devJoerg Roedel
All callers of iommu_group_get_for_dev() provide a device_group call-back now, so this fall-back is no longer needed. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-03-22iommu/arm-smmu: Switch to device_group call-backJoerg Roedel
This converts the ARM SMMU and the SMMUv3 driver to use the new device_group call-back. Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-03-22iommu: Add generic_device_group() functionJoerg Roedel
This function can be used as a device_group call-back and just allocates one iommu-group per device. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-03-22iommu: Export and rename iommu_group_get_for_pci_dev()Joerg Roedel
Rename that function to pci_device_group() and export it, so that IOMMU drivers can use it as their device_group call-back. Change-Id: Ic54268d9854dd2eeba53ca9f9635d0287bfc7f0f Signed-off-by: Joerg Roedel <jroedel@suse.de> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu: Revive device_group iommu-ops call-backJoerg Roedel
That call-back is currently unused, change it into a call-back function for finding the right IOMMU group for a device. This is a first step to remove the hard-coded PCI dependency in the iommu-group code. Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-03-22iommu/arm-smmu: Remove redundant calculation of gr0 base addressWill Deacon
Since commit 1463fe44fd0f ("iommu/arm-smmu: Don't use VMIDs for stage-1 translations"), we don't need the GR0 base address when initialising a context bank, so remove the useless local variable and its init code. Signed-off-by: Will Deacon <will.deacon@arm.com>
2016-03-22iommu: Implement common IOMMU ops for DMA mappingRobin Murphy
Taking inspiration from the existing arch/arm code, break out some generic functions to interface the DMA-API to the IOMMU-API. This will do the bulk of the heavy lifting for IOMMU-backed dma-mapping. Since associating an IOVA allocator with an IOMMU domain is a fairly common need, rather than introduce yet another private structure just to do this for ourselves, extend the top-level struct iommu_domain with the notion. A simple opaque cookie allows reuse by other IOMMU API users with their various different incompatible allocator types. Change-Id: I4a49976c4e496025b2a2b2b9ef749666a239294b Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> [pdaly@codeaurora.org Add changes only in iommu.h]
2016-03-22iommu/arm-smmu: ThunderX mis-extends 64bit registersTirumalesh Chalamarla
The SMMU architecture defines two different behaviors when 64-bit registers are written with 32-bit writes. The first behavior causes zero extension into the upper 32-bits. The second behavior splits a 64-bit register into "normal" 32-bit register pairs. On some buggy implementations, registers incorrectly zero extended when they should instead behave as normal 32-bit register pairs. Change-Id: I52410cf5f116620b10b696a11a991ee0bcc08dbf Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> [will: removed redundant macro parameters] Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/io-pgtable-arm: Don't use dma_to_phys()Robin Murphy
In checking whether DMA addresses differ from physical addresses, using dma_to_phys() is actually the wrong thing to do, since it may hide any DMA offset, which is precisely one of the things we are checking for. Simply casting between the two address types, whilst ugly, is in fact the appropriate course of action. Further care (and ugliness) is also necessary in the comparison to avoid truncation if phys_addr_t and dma_addr_t differ in size. We can also reject any device with a fixed DMA offset up-front at page table creation, leaving the allocation-time check for the more subtle cases like bounce buffering due to an incorrect DMA mask. Furthermore, we can then fix the hackish KConfig dependency so that architectures without a dma_to_phys() implementation may still COMPILE_TEST (or even use!) the code. The true dependency is on the DMA API, so use the appropriate symbol for that. Change-Id: I2f7087d43e2d8f16ea36f8e10530d0c4811a4fcd Signed-off-by: Robin Murphy <robin.murphy@arm.com> [will: folded in selftest fix from Yong Wu] Signed-off-by: Will Deacon <will.deacon@arm.com>
2016-03-22scatterlist: use sg_phys()Dan Williams
Coccinelle cleanup to replace open coded sg to physical address translations. This is in preparation for introducing scatterlists that reference __pfn_t. // sg_phys.cocci: convert usage page_to_phys(sg_page(sg)) to sg_phys(sg) // usage: make coccicheck COCCI=sg_phys.cocci MODE=patch virtual patch @@ struct scatterlist *sg; @@ - page_to_phys(sg_page(sg)) + sg->offset + sg_phys(sg) @@ struct scatterlist *sg; @@ - page_to_phys(sg_page(sg)) + sg_phys(sg) & PAGE_MASK Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2016-03-22iommu/io-pgtable-arm: Move init-fn declarations to io-pgtable.hJoerg Roedel
Avoid extern declarations in c files. Change-Id: I6d7e3ba54eae67a5604aa3c42fec7585fd329eff Signed-off-by: Joerg Roedel <jroedel@suse.de> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/io-pgtable: Remove flush_pgtable callbackRobin Murphy
With the users fully converted to DMA API operations, it's dead, Jim. Change-Id: Ia9b6679902a3ef1ae9ac6abf6eb4b0b492952fe4 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/arm-smmu: Remove arm_smmu_flush_pgtable()Robin Murphy
With the io-pgtable code now enforcing its own appropriate sync points, the vestigial flush_pgtable callback becomes entirely redundant, so remove it altogether. Change-Id: I0c5c2dfabb873e6045f0919ec853dd825f560564 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/io-pgtable-arm: Restore selftest_runningPatrick Daly
This variable is used by upstream. Restore it. Change-Id: I9742a4eb2f9708d02223fac12b831c096d901499 Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-22iommu/io-pgtable-arm: Centralise sync pointsRobin Murphy
With all current users now opted in to DMA API operations, make the iommu_dev pointer mandatory, rendering the flush_pgtable callback redundant for cache maintenance. However, since the DMA calls could be nops in the case of a coherent IOMMU, we still need to ensure the page table updates are fully synchronised against a subsequent page table walk. In the unmap path, the TLB sync will usually need to do this anyway, so just cement that requirement; in the map path which may consist solely of cacheable memory writes (in the coherent case), insert an appropriate barrier at the end of the operation, and obviate the need to call flush_pgtable on every individual update for synchronisation. Change-Id: I3716a707495ae0c8a625bbd81d8547ae08363a43 Signed-off-by: Robin Murphy <robin.murphy@arm.com> [will: slight clarification to tlb_sync comment] Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Remove flush_pgtable()]
2016-03-22iommu/arm-smmu: Clean up DMA API usageRobin Murphy
With the correct DMA API calls now integrated into the io-pgtable code, let that handle the flushing of non-coherent page table updates. Change-Id: I0de39b8e4fe3e5e6912e22a74cd5963b246ad083 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/io-pgtable-arm: Allow appropriate DMA API useRobin Murphy
Currently, users of the LPAE page table code are (ab)using dma_map_page() as a means to flush page table updates for non-coherent IOMMUs. Since from the CPU's point of view, creating IOMMU page tables *is* passing DMA buffers to a device (the IOMMU's page table walker), there's little reason not to use the DMA API correctly. Allow IOMMU drivers to opt into DMA API operations for page table allocation and updates by providing their appropriate device pointer. The expectation is that an LPAE IOMMU should have a full view of system memory, so use streaming mappings to avoid unnecessary pressure on ZONE_DMA, and treat any DMA translation as a warning sign. Change-Id: I954414051c3cdee407613fea9447f15cfa94fada Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Call io_pgtable_alloc_pages()]
2016-03-22iommu/arm-smmu: Sort out coherencyRobin Murphy
Currently, we detect whether the SMMU has coherent page table walk capability from the IDR0.CTTW field, and base our cache maintenance decisions on that. In preparation for fixing the bogus DMA API usage, however, we need to ensure that the DMA API agrees about this, which necessitates deferring to the dma-coherent property in the device tree for the final say. As an added bonus, since systems exist where an external CTTW signal has been tied off incorrectly at integration, allowing DT to override it offers a neat workaround for coherency issues with such SMMUs. Change-Id: I05f5d4bb2cbbbfa28446e423829f00f4a2aa0df3 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [pdaly@codeaurora.org Change dev_notice to dev_dbg]
2016-03-22include, lib: add __printf attributes to several function prototypesNicolas Iooss
Using __printf attributes helps to detect several format string issues at compile time (even though -Wformat-security is currently disabled in Makefile). For example it can detect when formatting a pointer as a number, like the issue fixed in commit a3fa71c40f18 ("wl18xx: show rx_frames_per_rates as an array as it really is"), or when the arguments do not match the format string, c.f. for example commit 5ce1aca81435 ("reiserfs: fix __RASSERT format string"). To prevent similar bugs in the future, add a __printf attribute to every function prototype which needs one in include/linux/ and lib/. These functions were mostly found by using gcc's -Wsuggest-attribute=format flag. Change-Id: I17371bb8a1cc40cc0b56fcdded609cc24fe7e261 Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Felipe Balbi <balbi@ti.com> Cc: Joel Becker <jlbec@evilplan.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> [pdaly@codeaurora.org Resolve minor conflicts]
2016-03-22iommu/arm-smmu: Fix broken ATOS checkWill Deacon
Commit 83a60ed8f0b5 ("iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition") accidentally negated the ID0_ATOSNS predicate in the ATOS feature check, causing the driver to attempt ATOS requests on SMMUv2 hardware without the ATOS feature implemented. This patch restores the predicate to the correct value. Cc: <stable@vger.kernel.org> # 4.0+ Reported-by: Varun Sethi <varun.sethi@freescale.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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