summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-05-27mmc: sdhci-msm: Ignore data timeout error for R1B commandsSahitya Tummala
Ignore data timeout error for R1B commands as there will be no data associated and the busy timeout value for these commands could be lager than the maximum timeout value that controller can handle. CRs-fixed: 473435 Change-Id: I61f7463cf09648ad9fab83437abf5004effc7758 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Add timestamp debug info for data timeout errorSahitya Tummala
This helps check the controller timeout logic in case of data timeout errors. Change-Id: Ia30757192e49865698c5f52940e1dc5d97746185 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci-msm: Fix issue with MSM bus bandwidth votingSahitya Tummala
The driver is using wrong clock rate to calculate the required bandwidth and due to this voting is happening for more bandwidth than it is required. This is ultimately preventing system core voltage from entering into low power mode. The sdhci_host clock indicates the clock rate as requested by MMC core layer and the actual rate that is set is indicated by clk_rate within struct sdhci_msm_host. As of now, sdhci_host clock is being used to calculate the bandwidth whereas bus-bw-vectors-bps indicates only supported bandwidths and hence a mismatch. Fix this by using the right clock rate which is clk_rate within struct sdhci_msm_host. Change-Id: If7d81e44a9b479c4c8e9fbaa7e092af2afb9cb9f Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-27mmc: sdhci: Fix issues with msm 3.9 kernelSahitya Tummala
This patch fixes the following issues in sdhci driver from msm 3.9 kernel - 1. gpio_get_value_cansleep() is used from atomic context resulting in warning from gpio driver. Move it to non-atomic context. 2. Move sdhci_enable_preset_value() in set_ios callback after clocks are enabled otherwise it would result in access to SDHCI registers if clocks are disabled due to clock gating or suspend. Change-Id: I231aa6e5c02669cf1aa3f21764642fa7da9a01ff Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Fix issues with power IRQ handlingSahitya Tummala
The SDHC core power control IRQ gets triggered when - * there is a state change in power control bit (bit 0) of SDHCI_POWER_CONTROL register. * there is a state change in 1.8V enable bit (bit 3) of SDHCI_HOST_CONTROL2 register. * Bit 1 of SDHCI_SOFTWARE_RESET is set. This patch addresses the following 2 issues - The reset state of 1.8V enable bit in SDHCI_HOST_CONTROL2 is 0 which indicates 3.3V IO voltage. So, when MMC core layer tries to set it to 3.3V before card detection, the IRQ doesn't get triggered as there is no state change in this bit. Hence, with the current code, the VDD IO voltage is never getting set to 3.3V. This patch fixes this issue by setting the VDD IO voltage to 3.3V whenever SDHC gets powered up. We get different IRQ ACK status for each of these requests - power on, power off, IO high, IO low. As of now, the driver is not considering the IRQ ACK for IO high and IO low requests and is returing prematurely from check_power_status() based on the previous ACK for power on/off requests. This is resulting voltage switch errors during voltage switch sequence for SD/eMMC cards. This issue is fixed by passing the request type to check_power_status host op so that driver can wait for its corresponding ACK from power IRQ. Change-Id: I07707ac5df731a0d3e4abead28076f0bbbf75c0a Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed compilation error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Add check_power_status host operationSahitya Tummala
MSM SDHCI doesn't control power as specified by the Standard Host Controller 3.0 spec. Writing to power control register/ reset register/voltage bit of host control register would trigger an IRQ with appropriate status bits set. Hence, use host op check_power_status after writing to power control register to check the status and wait until the IRQ is handled. Change-Id: Ied1a82e385547f7f5d60807fc896ea5a13084657 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [venkatg@codeaurora.org: fix trivial merge conflicts] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict & compilation error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci-msm: add quirk for max_discard calculationKrishna Konda
The SDHCi driver by default specifies a parameter that causes the core layer to calculate a max discard value which will be set on the mmc queue. Unfortunately the value calculated because of this would be very small compared to what comes in by default. As a result of this, any secure discard kind of operations are very slow. Instead add quirk so that any SDHCi hosts that would like to use the default value can do so. Change-Id: Ifa1343c3e7f14b031da30b06203a8831ba544889 Signed-off-by: Krishna Konda <kkonda@codeaurora.org> [venkatg@codeaurora.org: change max_discard_to was renamed to max_busy_timeout in 3.14 kernel] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed compilation error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Check device state before starting a requestAsutosh Das
This patch checks the device state before starting a request. It also prints out useful information in case of error conditions. Change-Id: Iaf87bb069c3ffb13c9b3f174c07c25d612bdcee9 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> [venkatg@codeaurora.org: remove pm related stuff] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci-msm: disable BKOPS featureSahitya Tummala
The BKOPS feature is supported for eMMC cards of version 4.41 and higher. The BKOPS feature is one time programmable and once it was enabled on a certain MMC card is cannot be disabled. LA builds are often being used to verify phones that are targeted for other HLOSes. Since not all the HLOSes implement the BKOPS features, enabling this feature by default can cause instability when the phone will be used by HLOSes other than LA. Change-Id: I7b9eab0d04a86dfeaf7565dcda8bc9d2035fe02d Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-27mmc: sdhci-msm: Disable SDHC slots at bootup if requiredVenkat Gopalakrishnan
Add support to disable available SDHC slots at bootup controlled via a module param with a bit mask of slots to disable. QDSS is one use case where SDHC slot is disabled for trace output. Example Usage: Passing sdhci_msm.disable_slots=1 as kernel command line argument would disable SDHC slot 1, whereas passing sdhci_msm.disable_slots=3 would disable both slots 1 and 2. Change-Id: I97bc517adfe4a1a81a97a2789d77404b0f22b124 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
2016-05-27mmc: sdhci: Enable clock scaling featureSahitya Tummala
Add support for enabling clock scaling feature and indicate the same to MMC core layer by setting the capability MMC_CAP2_CLK_SCALE. Change-Id: I24f144d3f727160c302966888fb439b3a39a0dde Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [venkatg@codeaurora.org: sdhci_set_clock is now a library function thats called from platform clock handler, make changes to address that] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed compilation error] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci-msm: Implement uhs_set_signaling to select right modeSahitya Tummala
The MSM SDHCI controller requires SDR104 mode to be set for HS200 cards. To handle this case, implement uhs_set_signaling so that the mode selection for MSM SDHCI doesn't happen in sdhci driver. Change-Id: I901dc82312b4299e86a7812dd74d3682650966a2 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [venkatg@codeaurora.org: Fix fn signature for set_uhs_signaling that changed as part of 3.14 kernel] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-27mmc: sdhci-msm: update dma_mask for SDHC deviceSahitya Tummala
Set the dma_mask to 0xffffffff to indicate full 32-bit address space and thus avoiding unnecessary buffers bouncing from high to low memory. Change-Id: Idaffe14d4e54a27b15e5a5d82dad41d843714d57 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-27mmc: sdhci-msm: Add support for hardware based card detectionSahitya Tummala
Add support for hardware based card detection for external SD card slot. Change-Id: I3e081f2eff54d6932a89f826cc85c201c52ca840 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [venkatg@codeaurora.org: Fix arguments for mmc_gpio_request_cd as the signature had changed in 3.14 kernel] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-27mmc: sdhci: Vote for the required MSM bus bandwidthSahitya Tummala
Vote for the MSM bus bandwidth required by SDHC driver based on the speed and bus width of the card. Otherwise, the system clocks may run at minimum clock speed and thus affecting the performance. Change-Id: Icf0c8710adbe2770f4eae283a50f4a13671f703f Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Vote for PM QOSSahitya Tummala
Vote for PM QOS by specifying the acceptable CPU to DMA latency so that system can enter into the possible power states without affecting the SDHC performance. Change-Id: I5fcf9aa93da690c6e64ab70ea5b039ca663c80ad Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict and compilation errors] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27Revert "mmc: core: Remove the ->enable|disable() callbacks"Subhash Jadavani
This reverts commit 40433267331bc6b9d70d5cdd14bfa2c8e3e5f0ec as MSM platforms still needs ->enable/disable() callbacks. Conflicts: drivers/mmc/core/core.c Change-Id: Ifd986825c10f1475bfcdac37ea1f3b99e5f6daaf Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Add host driver support to enable clock gatingSahitya Tummala
Enable config MMC_CLKGATE to enable aggressive clock gating framework that will disable clocks when the host is not in use for 200ms. Change-Id: I6bef5dc18b561871689b3d730fd3486323b12520 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [venkatg@codeaurora.org: sdhci_set_clock is now a library function thats called from platform clock handler, make changes to address that] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fixed minor merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci-msm: configure adma descriptors for large request sizeAsutosh Das
This patch adds a function to configure adma descriptors to support request size upto 512MB. Change-Id: Ie2ad32106422bb5bdbf72b08d1ecdd74d9a93c19 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
2016-05-27mmc: sdhci: Enable MMC_CAP_HW_RESET capabilitySahitya Tummala
Enable MMC_CAP_HW_RESET capability so that MMC block layer can reset the hardware during error recovery scenarios. Change-Id: I6100a3c6c34ee4c965595e422f793b195a758a46 Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-27mmc: sdhci-msm: Implement platform_execute_tuning and toggle_cdr callbacksVenkat Gopalakrishnan
Implement platform_execute_tuning and toggle_cdr callbacks that are needed to support HS200 and SDR104 bus speed modes. Also, set IO_PAD_PWR_SWITCH control bit in vendor specific register if the IO voltage level is within low voltage range (1.7v - 1.9v). Change-Id: If41704758d097229ffc0204d581886e137e8b581 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> [venkatg@codeaurora.org: Rename tuning ops fn to platform_execute_tuning] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-27mmc: sdhci: Add a quirk to ignore CMD CRC err for tuning commandsSahitya Tummala
MSM SDHCI controller doesn't support tuning as specified by the Standard Host Controller 3.0 spec. As a result of which, CMD CRC errors are expected for tuning commands. Hence, add a new quirk SDHCI_QUIRK2_IGNORE_CMDCRC_FOR_TUNING to ignore those errors for tuning commands. Change-Id: Id43d300bf8fabea921c80931fbf45cd3782ff3fa Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fix trivial merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: sdhci: Add SW workarounds for HW bugsVenkat Gopalakrishnan
Initial version of Qualcomm SDHC has the following two h/w issues. This patch adds s/w workarounds for the same. H/W issue: Read Transfer Active/ Write Transfer Active may be not de-asserted after end of transaction. S/W workaround: Set Software Reset for DAT line in Software Reset Register (Bit 2). Added a quirk SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT to enable this workaround. H/W issue: Slow interrupt clearance at 400KHz may cause host controller driver interrupt handler to be called twice. S/W Workaround: Add 40us delay in interrupt handler when operating at initialization frequency(400KHz). Added a quirk SDHCI_QUIRK2_SLOW_INT_CLR to enable this workaround. Change-Id: I8b4062f101085adadd66560f77b98b04d75cb836 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> [subhashj@codeaurora.org: fix trivial merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-27mmc: host: add pad and tlmm configurationAsutosh Das
This patch adds the pad and tlmm configuration to msm-sdhci driver. Change-Id: Ic2b9beffdb555598bdc15b4b03c8adb78fbd0c2c Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-27mmc: host: add SDHCI platform driver for msm chipsetsAsutosh Das
This platform driver adds the support of Secure Digital Host Controller Interface compliant controller in MSM chipsets. Change-Id: Ide3a658ad51a3c3d4a05c47c0e8f013f647c9516 Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> [subhashj@codeaurora.org: fix trivial merge conflicts and Changed Qualcomm to Qualcomm Technologies, Inc.] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-20mmc: sdhci-msm: remove support for Qualcomm chipsetsSubhash Jadavani
The upstream sdhci-msm driver has diverged, removing the upstream version to recreate our internal tree from msm-3.18 to msm-4.4. Change-Id: I952b08667177272fdc30fea79b445f96a3fc2182 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-19mmc: core: Fix error handling of MMC_BLK_DATA_ERRSahitya Tummala
Avoid retrying using single block for read commands that fail with MMC_BLK_DATA_ERR. The single block read retry is needed only in case of a CRC error for which MMC_BLK_ECC_ERR will be set anyway by mmc_blk_err_check(). Change-Id: Iec9487fd73ecf2bdd5e62732cd42cdb3a639d0dc Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2016-05-19mmc: sdhci: Reset cmd err only for sbc commandsVenkat Gopalakrishnan
The data complete interrupt is also used to indicate that a busy state has ended. Fix a race condition between sdhci_cmd_irq() that sets any cmd err and sdhci_data_irq() (received to indicate end of busy state) that clears cmd error. This can happen when a cmd err is set and finish tasklet is scheduled but sdhci_data_irq() executes before the tasklet. The cmd err status is critical for the tasklet handler to reset the controller's state machine. This should be cleared only when we have successfully processed a sbc command and are ready to submit the actual command next, not when there is an actual cmd err. CRs-fixed: 733074 Change-Id: I91ea2b949c34446fb629446aabb21505734e27bb Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-19mmc: sdhci-msm: Disable HS200 modeVenkat Gopalakrishnan
Disable HS200 mode until all msm-3.10 mmc changes have been ported to msm-3.14. This avoids potential hangs at boot. Change-Id: Ifc3dfbad59705db86c133b26baef0bc739a5dc30 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-19sdhci: msm: add support for new vendor capabilitiesAbhimanyu Kapur
Add support for new vendor capabilities on the msm sdhci controller. Change-Id: I934e35de4c566c9ba351e39d6eab3d88ae61a4d0 Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> [subhashj@codeaurora.org: fix trivial merge conflict] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-19mmc: host: sdhci: don't set SDMA buffer boundary in ADMA modeSubhash Jadavani
SDMA buffer boundary size parameter in block size register should only be programmed if host controller DMA is operating in SDMA mode otherwise its better not to set this parameter to avoid any side effect when DMA is operating in ADMA mode operation. Change-Id: Ia29ca4759ead2e4c9ea1d72908444a03bf205bac Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org> [venkatg@codeaurora.org: fix trivial merge conflict] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-19mmc: core: add long read time fixup for certain Samsung eMMCGuoping Yu
Certain Samsung eMMC meet multi read timeout, and could not reponse status CMD anymore after that. Add long read timeout fixup to resolve it. Change-Id: Ibeb0e6ab3d889d48fdee91244bec720a6994b907 Signed-off-by: Guoping Yu <guopingy@codeaurora.org> [venkatg@codeaurora.org: fix trivial merge conflict] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-19HACK: mmc: sdhci-msm: setup vdd and vdd-io suppliesJosh Cartwright
Change-Id: Ifd906146eb61d413880693ec7f306067895f5dac Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
2016-05-19mmc: sdhci-msm: adapt to allow drop-in use in place of downstream driverGeorgi Djakov
In order for this driver to function as a drop-in replacement for the msm-3.10 driver: - Allow selectability on ARCH_MSM - Rename clock names to include _clk prefix - Change supported compatible string Change-Id: I20bc683512ebdd22fcd7845c7e43dd645a2f146f Signed-off-by: Georgi Djakov <gdjako@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> [venkatg@codeaurora.org: fix kconfig options conflict] Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-05-19Revert "mmc: core: Remove MMC_CLKGATE"Subhash Jadavani
This reverts commit 9eadcc0581a8ccaf4c2378aa1c193fb164304f1d. Clock gating is needed for Qualcomm Platforms hence reverting this upstream patch. Change-Id: I96ac0c1c7627e8e5c2d18782e2fc08608f0a7f91 Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-05-18ASoC: pcm: Add support for fixup callbackAnish Kumar
Fixup callback is added for dais which do not follow the FE and BE convention and is directly controlled by userspace such as hostless dais. This will restrict the hw_params based on what is supported by hardware rather than blindly setting what is given by userspace. Change-Id: I401c70ab5de1df10363ec808cb68f72d8d74af96 Signed-off-by: Anish Kumar <kanish@codeaurora.org> Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-05-18ARM: dts: msm: do not configure secondary pon reset for pmicobaltSubbaraman Narayanamurthy
As per the hardware documentation, PON device in pmicobalt need not have to be configured during any type of reset. Hence remove the DT property "qcom,secondary-pon-reset" from pmicobalt PON device. CRs-Fixed: 1001210 Change-Id: Iaf46a2247e70e17ed0b0032038860bfa64e7f7c6 Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-18ARM: dts: msm: Update MPM interrupt mappings for cobaltMahesh Sivasubramanian
Update MPM interrupt mapping to monitor system wakeup interrupts per HW specfication. Change-Id: I0fff3caee8f4e2e1ed4e036f9fa9e6717f5cdfd7 Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-05-18iommu/iommu-debug: Maintain list of domains during allocSusheel Khiani
Current list of domains in iommu-debug was only maintained during attach/detach calls. But for masters like graphics this won't account for all the domains, as it allocates multiple different domains but attaches only one domain at a time. Add support for maintaining list of unattached domains too by adding them to debug_attachments list during domain alloc but keeping dev as NULL. We would add entry in debugfs attachment directory only on actual attach call. Change-Id: Ifde043e5c39f356b4187a30cbdf020ee943618f1 Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-05-18arm64: process: Use continuation prints for show_dataTrilok Soni
show_data messages for the value at the addresses needs to printed in the continuation. CRs-Fixed: 1010438 Change-Id: I41c48e090ec4c44aeccd0e8fbbcb814b55c0416d Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
2016-05-18ASoC: compare CPU DAI stream name to find BE DAIBanajit Goswami
While setting up route for a particular device, compare stream name of CPU DAI and Backend DAI to find the correct Backend DAI. Change-Id: Ic3f7c0e5b2a1055e7fdf52c78ded797a9a126d03 Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
2016-05-18msm: wlan: Add new country XAAmar Singhal
New country XA is based on Japan. The channels 5170-5250 are marked as PASSIVE. CRs-Fixed: 990486 Change-Id: I6dad4ce061316680239b3f9c23e64b23a875eb75 Signed-off-by: Amar Singhal <asinghal@codeaurora.org>
2016-05-18usb: gadget: gsi: Use drain_workqueue instead of flush_workqueueMayank Rana
USB GSI function driver uses usb_ipa_w work to queue different events like EVT_CONNECTED, EVT_DISCONNECTED and more. ipa_event_handler() uses those events as inputs to make necessary decision about performing connect and disconnect with IPA driver. It is required that before USB GSI driver calls ipa_usb_deinit_teth_prot(), it has invoked IPA disconnect API ipa_usb_xdci_disconnect() if it has called ipa_usb_xdci_connect() API. Current code is making sure that any running usb_ipa_w work is being completed before calling ipa_usb_deinit_teth_prot() but if work is not scheduled and pending, ipa_usb_xdci_connect() is not called (i.e. later when usb_ipw_w work is scheduled, EVT_DISCONNECTED is being processed but gsi_unbind() has changed sm_state as STATE_UNINITIALIZED which results into no-ops.) which results into USB and IPA driver go out of sync in terms of expected state machine. Hence calling ipa_usb_init_teth_prot() on next USB cable connect from gsi_bind_config() fails which results into no USB GSI functionality. Fix this issue by using drain_workqueue() instead of flush_workqueue() which makes sure that re-queue work is flushed. CRs-Fixed: 1005018 Change-Id: I64ff559b85f901688a4abd0110ebb32a5317e34d Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-05-18defconfig: arm64: msmcortex: enable QPNP_POWER_ON support for msmcobaltSubbaraman Narayanamurthy
Enable QPNP_POWER_ON device support for msmcobalt platform so that the power-on/off reasons of PMIC PON devices can be printed out during bootup. Also, based on the reset type, PON devices needs to be configured as per the hardware documentation. CRs-Fixed: 1001210 Change-Id: I3db5f233e7c182e330f5144b4ab0d0769abf4a8d Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-18defconfig: msm: Sync up with Kbuild defaultsMitchel Humpherys
The defconfigs have gotten out of sync again. Sync them up. CRs-Fixed: 1017606 Change-Id: I7d2ac7172396e5e08cde8ef156685222eb8941d8 Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-05-18ARM: dts: msm: Add snapshot of power-on.hSubbaraman Narayanamurthy
This DT bindings header file snapshot is taken as of msm-3.18 'commit 0b20839e37187 ("Merge "slim-msm: Synchronize SSR callbacks"")'. CRs-Fixed: 1001210 Change-Id: Ic132efb650d4e8de561c3d1f95a281afeef4ce42 Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-18msm: camera: sensor: Updating soc layer clock API for i2c driversSureshnaidu Laveti
Updating SOC layer clock API to support both platform drivers and i2c driver. Change-Id: I3d4a2e5c778c23dd80644080fdad7512c5e71e33 Signed-off-by: Sureshnaidu Laveti <lsuresh@codeaurora.org>
2016-05-18block: zram: Fix compilation issuesSatya Durga Srinivasu Prabhala
While porting changes to 4.4, looks like some functionality lost and causing below compilation issues if we try to enable ZRAM. [1] drivers/block/zram/zram_drv.c: In function 'zram_bvec_write': drivers/block/zram/zram_drv.c:724:9: error: 'ALLOC_ERROR_LOG_RATE_MS' \ undeclared (first use in this function) ALLOC_ERROR_LOG_RATE_MS)) ^ drivers/block/zram/zram_drv.c:724:9: note: each undeclared identifier \ is reported only once for each function it appears in drivers/block/zram/zram_drv.c: In function 'zram_add': drivers/block/zram/zram_drv.c:1239:34: error: 'struct zram' has no \ member named 'queue' __set_bit(QUEUE_FLAG_FAST, &zram->queue->queue_flags); ^ make[4]: *** [drivers/block/zram/zram_drv.o] Error 1 make[3]: *** [drivers/block/zram] Error 2 make[2]: *** [drivers/block] Error 2 make[1]: *** [drivers] Error 2 [2] drivers/block/zram/zram_drv.c: In function 'zram_add': drivers/block/zram/zram_drv.c:1241:34: error: 'struct zram' \ has no member named 'queue' __set_bit(QUEUE_FLAG_FAST, &zram->queue->queue_flags); ^ make[4]: *** [drivers/block/zram/zram_drv.o] Error 1 make[3]: *** [drivers/block/zram] Error 2 make[2]: *** [drivers/block] Error 2 CRs-Fixed: 1013947 Change-Id: I4f7944069306ba92e1fd82625bc15c7fa3bcdb0c Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2016-05-18ARM: dts: msm: Enable Camera VFE, Pproc, jpeg nodes for msmcobaltJinHee Kim
Enable camera VFE, Pproc and jpeg nodes in dtsi. CRs-Fixed: 1017151 Change-Id: I33b172ca712064dcc86a87ae413f868f8d7d4342 Signed-off-by: JinHee Kim <jinheek@codeaurora.org>
2016-05-18perf: duplicate deletion of perf eventSrinivasarao P
a malicious app can open a perf event with constraint_duplicate bit set, disable the event, and close the fd. On closing the fd, the perf_release() modification causes the kernel to clean up the event as if it still were enabled, leading to the event being removed from a list twice. CRs-Fixed: 977563 Change-Id: I5fbec3722407d2f3d0ff0d9f7097c5889e31fd62 Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-21 10:54:40 +0000