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2016-04-22usb: gadget: f_gsi: Allocate dma memory using gadget device's parent deviceHemant Kumar
Use "gadget->dev.parent" instead of "&gadget->dev" in the first argument of dma_zalloc_coherent() because the parent has a udc controller's device pointer. Otherwise, iommu functions are not called in ARM environment and allocation is failing. CRs-Fixed: 1003784 Change-Id: I2ea75b533f857189856840e437a96891eea5699c Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-04-22usb: gadget: f_gsi: Fix bug in accessing evt queue lockHemant Kumar
In case gsi_update_function_bind_params() returns failure before initializing spin lock for event queue, gsi_bind() continues further by calling post_event() which acquires the uninitialized spin lock causing BUG. Hence check for return value of gsi_update_function_bind_params() before calling post_event(). CRs-Fixed: 1003784 Change-Id: I0fcad2467d15f311feecf3b9cee9209f7453485c Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-04-22usb: dwc3: Allocate fixed h/w eps for GSI endpointsDevdutt Patnaik
Adds support to allocate specific hardware EPs to GSI enabled endpoints. Creates EP list with names "gsi-epin" for IN and "gsi-epout" for OUT EPs that are intended for use by the GSI function driver. The EPs are reserved from the end of the EP list. CRs-Fixed: 1003784 Change-Id: I70ebce8c2717baaea38f7b6235976d8a522eb9fd Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
2016-04-22ARM: dts: msm: Set number of GSI event buffer for msmcobaltHemant Kumar
This allows configuration of event buffers for GSI based hardware accelerated endpoints. Change-Id: If9ae84c0de214bcb5057d14a6960b6fb528c6c14 CRs-Fixed: 1003784 Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-04-22usb: dwc3: Add support for GSI event buffer configurationHemant Kumar
Add additional event buffers for GSI based hardware accelerated endpoints and its related configuration. CRs-Fixed: 1003784 Change-Id: Ibedf73690040b8bd872f5621835680a66c22e265 Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-04-22msm: ipa3: enable smart prefetch control for xDCIGidon Studinski
Enable smart prefetch control for xDCI channels. This is done by configuring the channel scratch in GSI. Change-Id: I9a301da3c5426649b40069103d545e50bc75aad2 CRs-Fixed: 1004467 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
2016-04-22msm: ipa3: enable smart prefetch control for MHIGidon Studinski
Enable smart prefetch control for MHI channels. This is done by configuring the channel scratch in GSI. Change-Id: Icff18699ce96e224d6f58b8aadce006f3d5210ee CRs-Fixed: 1004468 Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
2016-04-22ARM: dts: msm: Add jpeg, FD and CPP HW dtsi changes for msmcobaltAshwini Rao
Add jpeg, FD and CPP HW dtsi nodes for jpeg encoder, jpeg DMA, face detection and CPP on msmcobalt. CRs-Fixed: 1001324 Change-Id: Ia62486e070310c3dccc0dc84490e5a9147ba8a56 Signed-off-by: Ashwini Rao <ashwinik@codeaurora.org>
2016-04-22ARM: dts: msm: Add icnss node for msmcobaltHardik Kantilal Patel
Add Adrestea base memory address and Copy Engine interrupt mapping entry. CRs-Fixed: 999575 Change-Id: Iab3d4aceeafc28b1df73fa9570405c6f21535f29 Signed-off-by: Hardik Kantilal Patel <hkpatel@codeaurora.org>
2016-04-22ASoC: msm: qdsp6v2: Limit codec register config packet sizeStephen Oglesby
APR packet size is now capped at 512 bytes. The codec register config data is 740 bytes. We now break up this data into multiple packets no larger than the defined maximum. CRs-fixed: 974874 Change-Id: I2bd3cb01ff389ffd1d319239019e11d35d8c16b6 Signed-off-by: Stephen Oglesby <soglesby@codeaurora.org>
2016-04-22defconfig: arm64: msm: Enable QPNP RTC config flagMohit Aggarwal
RTC driver is responsible for reading RTC value and also used for reading/setting Alarm value. This patch enables QPNP RTC config. Change-Id: Ibc2aee233e657ba73b42f41e9b20859e818d9e1d Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
2016-04-22soc: pcm: add arch_setup_dma_ops callShiv Maliyappanahalli
Make sure that DMA ops are initialized before attempting to allocate the DMA substream buffer. Change-Id: I03bcb4ac7ea415c00ce3047b844455f5c6546400 Signed-off-by: Shiv Maliyappanahalli <smaliyap@codeaurora.org>
2016-04-22usb: dwc3: msm: Move extcon registration later in probeJack Pham
It is possible that the extcon notifier may be triggered soon after it is registered, but before the mdwc->dwc3 has been populated. This leads to a NULL pointer dereference in vbus_notifier. Fix this by moving the extcon_register() call later in the probe until when the the driver would be ready to handle an immediate notification. CRs-Fixed: 1003908 Change-Id: I403da246f18c25a77fa7f66e152cbcdca8c00b16 Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-04-22cnss: Fix compilation error of missing CONFIG_CNSS_SECURE_FWYuanyuan Liu
Add #ifdef CONFIG_CNSS_SECURE_FW for cnss_get_fw_ptr and cnss_get_sha_hash. Change-Id: I884b4ab3d552b12dd83f852be565a5dc4e69e21a CRs-Fixed: 971688 Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
2016-04-22msm: ipa3: set GPI channels to DB modeSkylar Chang
In order to enable prefetch control in GSI, channels needs to be configured to doorbell mode. CRs-Fixed: 1000819 Change-Id: I4847982f48b09de1690bb474db9a60e018e0c0d6 Acked-by: Ady Abraham <adya@qti.qualcomm.com> Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-04-22USB: f_fs: Use HS and SS descriptors without checking gadget speedMayank Rana
User space function driver could always provide descriptors for all speeds irrespective of USB speed supported with USB gadget. If USB gadget is not high/super speed capable, f_fs driver doesn't parse HS or SS descriptors which results into OS descriptors processing fail due to checking against wrong offset within received descriptor buffer. Fix this issue by always processing HS and SS descriptors without checking USB gadget speed. CRs-Fixed: 1003565 Change-Id: Icb6537271ce55e44f5fc3e1ef28dd4d6810b681f Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-04-22msm: mdss: add support for configuring DSI PHY v3Aravind Venkateswaran
Add the initialization and shutdown programming sequence for the DSI PHY v3 which is used on msmcobalt. This includes configuring the phy lane timings, strength control, and regulator settings. CRs-Fixed: 1000724 Change-Id: I6a8d45ef71316b5a935a711a5b0a48c055c1c392 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22msm: mdss: add support dsi phy v3 timing used on msmcobaltAravind Venkateswaran
Add PHY timing calculation support for v3 PHY used on msmcobalt. This needed to program the DSI PHY to drive the link at a specific link rate based on the DSI panel configuration. CRs-Fixed: 1000724 Change-Id: I180af3544c111cb9f491ea9fb77638beece8299c Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22msm: mdss: refactor dsi phy timing calculationsAravind Venkateswaran
Refactor the DSI PHY timing calculations for v2 PHY. This will make things easier when support has to be added for new revisions. CRs-Fixed: 1000724 Change-Id: Icd99a3b29feddc64e42a2b4a18987579b7f52e77 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22msm: mdss: add support for dsi byte interface clockAravind Venkateswaran
DSI controller version 2.0 and above require configuring an additional link clock called the byte interface clock which is used to drive all high-speed PPI signals. Add support to configure this clock. CRs-Fixed: 1000724 Change-Id: I907823b21ad2c6152899233fc52f38d17bcc5ed1 Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22msm: mdss: refactor support for controlling LCD mode selection GPIOPadmanabhan Komanduru
For certain board configurations, the enable port on display connector card needs to be controlled via LCD mode selection GPIO. For example, for DSC/single DSI mode, the GPIO needs to be driven high and for non-DSC/split DSI mode, the GPIO needs to be driven low. Add support for this. CRs-Fixed: 1000724 Change-Id: I3546fc2b5dacd77e9d2cd2ea843481dc34bfef54 Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org> Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22msm: mdss: modify DSI phy init sequence for split-DSI configAravind Venkateswaran
For split-DSI hardware configuration, both the DSI controller clocks are sourced from a single PLL (clock-master). In such cases, it is important to initialize both DSI0 PHY and DSI1 PHY prior to enabling the PLL. This is due to the fact that for certain HW versions, PLL programming for the clock-master may require configure some PLL registers on the clock-slave. If the PHY init sequence for the clock-slave is called after PLL is programmed, it could reset those PLL registers leading to unexpected behavior. Fix this by ensuring that PHY init sequence is done for both controllers at the same time for split display usecases. CRs-Fixed: 1000724 Change-Id: I09fb8097d31cd0390cea5c32bb7aabceeff2c37e Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-04-22usb: gadget: f_cdev: Fix recursive spin lock bugHemant Kumar
Since driver context f_cdev is not freed until the driver is unloaded, port_usb remains available to be accessed for driver operations. Hence there is no need to protect port_usb using spin lock. Hence remove un-needed spin lock/unlock from some of the APIs which prevents recursive spin lock. Also, make sure char device is destroyed before f_cdev context is freed up. Change-Id: Ib91f23c070065185da72387300304f2690d5a8b1 Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-04-22usb: gadget: composite: Set default value of bcdUSB as 0x0200Mayank Rana
When l1_supported is false and USB gadget max speed is high speed only, composite framework is not updating bcdUSB as 0x0200 which results into bcdUSB set as 0x00 used as part of device descriptors. This is against USB specification and also USB host may behave differently. Fix this issue by setting default value of bcdUSB as 0x0200. CRs-Fixed: 1006330 Change-Id: I8330f0609540d97f5bca78c42ed193537f497a73 Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-04-22ASoC: wsa881x: Add pinctrl support for shutdown gpioSudheer Papothi
wsa881x codec shutdown gpio is connected to msmcobalt and control of this gpio happens through pinctrl. Add support in codec driver to enable/disable gpio using pinctrl. Change-Id: I9d627bf40f0e6be5d085eafc5e7211366e795c24 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-04-22defconfig: Enable msm codec pinctrl driver on msmcobaltSudheer Papothi
msm codec pinctrl driver is needed to handle codec reset gpios from msmcobalt. Change enables msm codec pinctrl driver. Change-Id: I37ced30d9b6062ccd7de3342a9ba5b61d3d8a9d6 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-04-22drivers: mfd: Move codec reset gpio config to early bootSudheer Papothi
WCD and WSA codecs uses MSM gpios that are accessed through pinctrl mechanism. Codec reset gpios need to be configured before master controller is initialized otherwise codec cannot be enumerated on the bus. Add a new platform device driver to update reset gpio configuration to valid state before bus initialization. Change-Id: I1e36f4a85334704652c6b50950f50b90224a472e Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-04-22soc: qcom: Check for exact value instead of non-zeroPuja Gupta
SP-PBL could be writing other values to err_status_spare2 register and hence check for exact value to conclude its wdog_bite. CRs-Fixed: 1005034 Change-Id: Iaef99256f86c2e6508554f2d144d1514f10e6049 Signed-off-by: Puja Gupta <pujag@codeaurora.org>
2016-04-22drivers: soc: Add intent notification callback for APR GlinkJosh Kirsch
APR is required not to send any packet until the far end queues at least one intent. Add the wait during client registration time. Change-Id: Ie29ddda4527ae7a70afff2c595d6e3c76500a8af Signed-off-by: Deven Patel <cdevenp@codeaurora.org> Signed-off-by: Josh Kirsch <jkirsch@codeaurora.org>
2016-04-22coresight-qpdi: add support to skip LDO configurationShashank Mittal
On few devices QPDI's LDOs are configured by some other component. This change adds support to skip LDO configuration on such devices. Change-Id: I84c8b4a5a0d6155a39e43e0503961f76e2d8a615 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: add HW event driver support in upstream implementationShashank Mittal
Add HW event driver in upstream implementation of Coresight driver. This change copies coresight-hwevent.c file from drivers/coresight (commit f9b3004b242c ("msm: pcie: enable/disable PCIe AER from debugfs")) to driver/hwtracing/coresight directory. Change-Id: I2d75108bae975107ee5c13fa5dfb5846185fbd3d Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: add qpdi driver support in upstream implementationShashank Mittal
Add qpdi driver in upstream implementation of Coresight driver. This change copies coresight-qpdi.c file from drivers/coresight (commit f9b3004b242c ("msm: pcie: enable/disable PCIe AER from debugfs")) to driver/hwtracing/coresight directory. Change-Id: I8f29f386a31aec1a10a1398e0753a3b4355b3449 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight-tmc: add support to set default sinkShashank Mittal
Add support to set default sink at probe time. Change-Id: I62abe39a5cb5e7f8b1bb1198cecd3b529b124de8 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight-tmc: add support to switch sinksShashank Mittal
Add support to switch to a different Coresight sink when one or more Coresight tracing sources are enabled. Change-Id: I79f769f0913124710ae56fddea7d205359e09b43 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: add remote etm driver support in upstream implementationShashank Mittal
Add remote etm driver in upstream implementation of Coresight driver. This change copies coresight-remote-etm.c file from drivers/coresight (commit c1fe9ac38d93 ("input: touchscreen: correct function and variable names in ITE tech driver")) to driver/hwtracing/coresight directory. Change-Id: I77a1aaf10aaf3f3010ab19d5878bb53dcc504c29 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22msm_bus: coresight: fix to support upstream implementationShashank Mittal
Upstream's Coresight driver doesn't have id field in coresight_platform_data. So use device name instead to link bus clk with Coresight device node. Change-Id: I9f70974d64154217c2701879eb428beef1857fcf Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: fix kstrtoul usageShashank Mittal
Unlike sscanf kstrtoul function returns 0 on success and non-zero value in case of an error. Fix Coresight code to check error condition correctly. Change-Id: Id1bd544a9928ed6b13c278f12a47070d1ca353a7 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight-cti: use for_each_cpu instead of for_each_cpu_maskShashank Mittal
for_each_cpu_mask is deprecated, so replace that with for_each_cpu. Change-Id: I21a937053ce8a7f3a81a09f78e873b7c71421b72 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: fix compilation issue due to missing of_coresight.h fileShashank Mittal
In upstream implementation there is no of_coresight.h file. That causes compilation issue with some of the Coresight components. Change-Id: I81bf45e1e322e1d90ac70c6e73738b7348cf85e1 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22coresight: tmc: add usb bam support for etr deviceShashank Mittal
Add support to use etr device in usb bam mode. In usb bam mode traces can be streamed over usb. Change-Id: I5509c01aeb704a7b3ec8406130886145f7fddc10 Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-04-22msm: thermal: Request INT_MAX as max for regulator set voltage APIManaf Meethalavalappu Pallikunhi
During Vdd restriction trigger/clear request, KTM request it's vote to regulator via regulator_set_voltage() API. KTM is interested only in min value for this feature, always request INT_MAX as max value instead of supported MAX corner of that regulator. It makes sure that there is no impact if MAX corner for that regulator is changed at any time. Change-Id: Iebcb0383ea7b44d8584adb610ca7b56f0db2e755 Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2016-04-22arm64: mm: preserve 4k mappings for late mappingsLiam Mark
There are several features such as CONFIG_FREE_PAGES_RDONLY which depend on pages being mapped as 4k. When we creating late mappings ensure that 4K mappings aren't replaced with block mappings if CONFIG_FORCE_PAGES is enabled. CRs-Fixed: 1004260 Change-Id: I9f1853c71ba6dec92ede869b90e220d63af6ae3e Signed-off-by: Liam Mark <lmark@codeaurora.org> Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-04-22defconfig: msm: enable ipa3 nodes on cobaltSkylar Chang
enable ipa3 on cobalt build Signed-off-by: Skylar Chang <chiaweic@codeaurora.org> Change-Id: I562bf73e375ce78227746a9eaf0fb256abf69ce5
2016-04-22ARM: dts: msm: disable IPA3 on MSMCobalt rumiSkylar Chang
Disable ipa-driver on MSMCobalt rumi build. Signed-off-by: Skylar Chang <chiaweic@codeaurora.org> Change-Id: I8447214ca3fcf4567979ce2538dc342c4957e4d4
2016-04-22clk: msm: clock-gcc-cobalt: Remove support for glm clocksDevesh Jhunjhunwala
The glm clocks are controlled by TZ, so remove support for these clocks from the clock-gcc-cobalt driver. Change-Id: Ibfb8f211ca8c29617aca4ff0ee885366f95aac00 Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
2016-04-22clk: msm: clock: Change the check_enable_bit log to pr_warnDeepak Katragadda
Change the log about the clocks being enabled even without a SW vote to pr_warn instead of WARN. The stack trace isn't very helpful in this case and cause a lot of logging. Also, add the check_enable_bit property to some SMMU clocks which are votable. CRs-Fixed: 1006841 Change-Id: Icb15b038b170590e69073ca628b3d610e14893da Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-04-22clk: msm: clock-mmss-cobalt: Do not model the Throttle clock registersDeepak Katragadda
The throttle clocks are managed by XBL and HLOS does not need to control them. Remove support for these clocks from the clock driver. CRs-Fixed: 1006824 Change-Id: I1a33b3dbde6d5526be1073874e28b12350adad5e Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-04-22ARM: msm: dts: Add audio support on msmcobalt simulationSudheer Papothi
Add device tree entries of codec and sound node to have sound card enumeration done on msmcobalt simulation platform. This change enables audio functionality on msmcobalt simulation platform. Change-Id: I70c2b284b7302561e319061bbb1247f4482f6ff3 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-04-22ASoC: msmcobalt: Add machine driver support on simulationSudheer Papothi
Add FE(front end) and BE(Back end) DAI(Digital Audio Interface) links needed to support audio functionality on msmcobalt simulation platform. Change-Id: I87feebf29fb4b3e3e8db52d9d85c902c384d061f Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-04-22ASoC: msm: Enable APR over Glink on msmcobaltShiv Maliyappanahalli
Glink serves as a replacement of SMD. Add the support to enable Glink on msmcobalt. Change-Id: I49668889c6c983a3782f90b5871a69a8b12a2fba Signed-off-by: Shiv Maliyappanahalli <smaliyap@codeaurora.org>
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