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2016-03-22ARM: dts: msm: Use correct HS PHY IRQ for msm8996 secondary USBJack Pham
The driver change in commit 96f92e28e035 ("usb: dwc3-msm: Use hs phy and ss phy irq as wake up source") favored using hs_phy_irq over pwr_event_irq to wake up USB out of suspend. This change revealed the wrong IRQ was used for the secondary USB2s instance on msm8996. Use the correct HS PHY IRQ number which maps to QUSB. Map this IRQ to the corresponding MPM wakeup pin as well. Change-Id: Ibd56c10c3c96f88d964f7f5f8a0fe9b590c522c5 Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-22ARM: dts: msm: Add ss_phy_irq as SS USB wakeup sourceHemant Kumar
For mdmcalifornium in case of super speed suspend, power event irq is not generated upon bus resume. Hence explicitly register for lfps_rxterm irq as a wake up source to initiate resume sequence for controller in super speed mode. To have the same solution across all platforms, update 8996 dtsi. Also for 8996 update the correct hs_phy_irq interrupt number as that of QUSB PHY IRQ. Change-Id: Ie0e67f202513b2c4bf069c10f2b2538a08c8c80c Signed-off-by: Hemant Kumar <hemantk@codeaurora.org> Signed-off-by: Azhar Shaikh <azhars@codeaurora.org>
2016-03-22ARM: dts: msm: Remove unused ref_clk from USBJack Pham
As of commit b44b9c5ae647 ("usb: dwc3-msm: Remove voting for ref_clk") the USB device no longer references the ref_clk. Remove the unused entries from msm8996, mdm9640 and mdmcalifornium. Change-Id: I3979e56293c8729cf89b32677bb23216ce68f120 Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-22ARM: dts: msm: Add ref_clk_src to QUSB PHYs on msm8996Jack Pham
The QUSB PHY instances each require a ref clk sourced by PMIC ln_bb_clk in order to function properly. Since this clock is shared among other peripherals, make sure the PHYs also can enable it independently when needed. Change-Id: Id5837532a2c9249b7babb720483c94734d80b717 Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-22defconfig: arm64: msm: Enable RmNet Data featureSubash Abhinov Kasiviswanathan
Enabled RmNet data on msm based platforms in order to support MAP data feature as required for data connectivity. Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
2016-03-22ARM64: Enable APPENDED_DTB in Makefile and defconfigRohit Vaswani
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22defconfig: msm_defconfig: Enable ION and IOMMU defconfigs. Also cleanup the ↵Rohit Vaswani
defconfigs Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22arm64: dma: Bring back set_dma_ops for other internal uses like dma-removed.cRohit Vaswani
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22mm: Update is_vmalloc_addr to account for vmalloc savingsSusheel Khiani
is_vmalloc_addr currently assumes that all vmalloc addresses exist between VMALLOC_START and VMALLOC_END. This may not be the case when interleaving vmalloc and lowmem. Update the is_vmalloc_addr to properly check for this. Correspondingly we need to ensure that VMALLOC_TOTAL accounts for all the vmalloc regions when CONFIG_ENABLE_VMALLOC_SAVING is enabled. Change-Id: I5def3d6ae1a4de59ea36f095b8c73649a37b1f36 Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-22msm: Allow lowmem to be non contiguous and mixedSusheel Khiani
Currently on 32 bit systems, virtual space above PAGE_OFFSET is reserved for direct mapped lowmem and part of virtual address space is reserved for vmalloc. We want to optimize such as to have as much direct mapped memory as possible since there is penalty for mapping/unmapping highmem. Now, we may have an image that is expected to have a lifetime of the entire system and is reserved in physical region that would be part of direct mapped lowmem. The physical memory which is thus reserved is never used by Linux. This means that even though the system is not actually accessing the virtual memory corresponding to the reserved physical memory, we are still losing that portion of direct mapped lowmem space. So by allowing lowmem to be non contiguous we can give this unused virtual address space of reserved region back for use in vmalloc. Change-Id: I980b3dfafac71884dcdcb8cd2e4a6363cde5746a Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-22arm: keep address range pmd aligned while remapShiraz Hashim
During early init, all dma areas are remapped to PAGE_SIZE granularity. Since full pmd regions are cleared to be remapped into PAGE_SIZE, ensure that address range is pmd size aligned while not crossing memory boundaries. This would ensure that even if address region is not pmd aligned, its mapping would not be cleared but factored in to PAGE_SIZE regions. Change-Id: Iad4ad7fd6169cdc693d532821aba453465addb7c Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
2016-03-22arm64: mark split_pmd() with __init to avoid section mismatch warningsMatt Wagantall
split_pmd() calls early_alloc(), which is marked with __init. Mark split_pmd() similarly. The only current caller of split_pmd() is remap_pages(), which is already __init, so there was no real danger here in the first place. Change-Id: I3bbc4c66f1ced8fe772366b7e5287be5f474f314 Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-22arm64: Add support for KERNEL_TEXT_RDONLYRohit Vaswani
When using FORCE_PAGES to allocate the kernel memory into pages, provide an option to mark the the kernel text section as read only. Since the kernel text pages are always mapped in the kernel, anyone can write to the page if they have the address. Enable this option to mark the kernel text pages as read only to trigger a fault if any code attempts to write to a page that is part of the kernel text section. Change-Id: I2a9e105a3340686b4314bb10cc2a6c7bfa19ce8e Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22ARM64: mm: init: bring back poison_init_memAbhimanyu Kapur
Strict RWX requires poison_init_mem, bring it back from the dead. Change-Id: I09b88a12a47c8694e2ba178caad4415981f4f7e3 Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22arm64: mm: Do not create 1GB mappings if FORCE_PAGES is enabledRohit Vaswani
With CONFIG_FORCE_PAGES enabled, we break down the section mappings into 4K page mappings. For 1GB mappings, remapping the pages into 4K chunks becomes unnecessarily complicated. Skip creating the 1GB mapping if we know it's going to be separated into 4K mappings. Change-Id: I991768210ed6e1c1e19faf0d5d851d550e51a8c6 Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> (cherry picked from commit 2528a04cba82ce3d655dabf78bc49c5b64c89647)
2016-03-22arm64: Add support for FREE_PAGES_RDONLYNeeti Desai
Add config option to trigger page a fault if any code attempts to write to a page on the buddy list Change-Id: Ic5ab791c4117606519c7b9eb4c2876f246d23320 Signed-off-by: Neeti Desai <neetid@codeaurora.org>
2016-03-22arm64: Allow remapping lowmem as 4K pagesNeeti Desai
For certain debug features the lowmem needs to be mapped as pages instead of sections. Add config option to allow remapping of lowmem as 4K pages Change-Id: I50179311facd91b97ecde720da38ec7e47512e95 Signed-off-by: Neeti Desai <neetid@codeaurora.org>
2016-03-22arm64: Support early fixup for CMALaura Abbott
Although it isn't architecturally required, CMA regions may need to have attributes changed at runtime. Remap the CMA regions as pages to allow this to happen. Change-Id: I7dd7fa150ce69fdf05f8bf6f76a5ae26dd67ff1b Signed-off-by: Laura Abbott <lauraa@codeaurora.org> [lmark@codeaurora.org: resolve merge conflicts] Signed-off-by: Liam Mark <lmark@codeaurora.org>
2016-03-22arm64: add support for NO_KERNEL_MAPPING and STRONGLY_ORDEREDLaura Abbott
arm64 needs support for both DMA_ATTR_NO_KERNEL_MAPPING and DMA_ATTR_STRONGLY_ORDERD. Add support for both of them. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> [imaund@codeaurora.org: Resolved context conflicts] Signed-off-by: Ian Maund <imaund@codeaurora.org>
2016-03-22dma-mapping: Add dma_remap functionsLaura Abbott
After getting an allocation from dma_alloc_coherent, there may be cases where it is neccessary to remap the handle into the CPU's address space (e.g. no CPU side mapping was requested at allocation time but now one is needed). Add APIs to bring a handle into the CPU address space again. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> [imaund@codeaurora.org: resolved context conflicts and added support for remap 'no_warn' argument] Signed-off-by: Ian Maund <imaund@codeaurora.org>
2016-03-22arm64: Add options to disable I/D cachesStepan Moskovchenko
Add the ability to individually disable the Instruction and Data caches on ARM64 CPUs, by means of the SCTLR[I] and SCTLR[C] bits. This may be useful for performance profiling, as well as for troubleshooting potential cache problems. Change-Id: Ibd7fc796ddf6984c7f05dcd844432164e28bb021 Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> [abhimany: resolve trivial merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22defconfig: msm8996: enable msm bus scalingDavid Dai
Change-Id: I082d195359e736ab4f9ac9322a094219144bcae5 Signed-off-by: David Dai <daidavid1@codeaurora.org>
2016-03-22platform: msm: msm_bus: Add support for bus scalingDavid Dai
This snapshot is taken as of msm-3.18 commit 1513280 (Merge "platform: msm: msm_bus: Fix memory leak during client unregister)" Change Kconfig option to say QCOM_BUS* instead of MSM_BUS* Change-Id: I6dd9aba5b26984a914714ca49ae7253c1f267b4b Signed-off-by: David Dai <daidavid1@codeaurora.org>
2016-03-22ARM64: Introduce arch_read_hardware_idAbhimanyu Kapur
Moving towards device tree and arm single binary referring to machine descriptor name for hardware id information under /proc/cpuinfo is not suitable for certain soc vendors. Add a hook for soc vendors to supply a per-soc hardware read method. [abhimany: resolved minor merge conflicts] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> Conflicts: arch/arm64/kernel/setup.c Change-Id: I6c38a0c0dbf93acec6f6f67498c01c046a13e506
2016-03-22soc: qcom: Add socinfo driver snapshotAbhimanyu Kapur
This is a snapshot of the socinfo driver as of msm-3.14 commit: 3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm: camera: Add dummy sub module in sensor pipeline") Change-Id: I6b5b866ede0e84432fad460e9d95babfdbc556fc Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22defconfig: arm64: msm: Enable poweroff reset driver and download modeRunmin Wang
Enable POWER_RESET and DLOAD_MODE for defconfig and perf_defconfig Change-Id: If127eaa2b8dae27bdba67b53d920ccffc5cdb577
2016-03-22defconfig: arm64: msm: Enable SMP2PKarthikeyan Ramasubramanian
SMP2P is a simple, low-latency interprocessor communication protocol for communicating simple state changes between processors in the SoC. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-22arm64: qcom: increase number of max gpiosKarthikeyan Ramasubramanian
Increase number of maxium gpios for ARCH_QCOM. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-22arm64: msm: increase number of max gpiosJoonwoo Park
Increase number of maxium gpios for ARCH_MSM. Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-22CHROMIUM: ARM64: add gpio.h to increase default nrOlof Johansson
Signed-off-by: Olof Johansson <olofj@chromium.org> Signed-off-by: David Riley <davidriley@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206724 Git-commit: a98a5186344c027fb53506994ce93f7af8a79960 Git-repo: https://chromium.googlesource.com/chromiumos/third_party/kernel [joonwoop@codeaurora.org: fixed merge conflict in arch/arm64/Kconfig. removed Change-Id tag from commit text.] Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-22ARM: dts: 8996: update compatible for ufs driverVenkat Gopalakrishnan
Use the upstream naming convention and update the ufs driver compatible string. Change-Id: I599f774a92ad2f795f0c49ce095b26173f597b24 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-03-22defconfig: msm: Enable SCSI UFS low level driverVenkat Gopalakrishnan
Enable SCSI UFS configs to support Universal Flash Storage Controller. Change-Id: I65287b5f7c312266af69f84b8063f881f0398cb0 Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-03-22ARM: dts: msm: Enable the MSM GCC clock driver for MSM8996Devesh Jhunjhunwala
Enable the GCC clock driver in the MSM8996 device tree and update the uartblsp2dm1 serial node to use the correct clocks. Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
2016-03-01clk: msm: clock: Add support for MSM8996/COBALT clock treeTaniya Das
Add clock tree support for MSM8996 and MSMCOBALT, and add corresponding dt bindings header files. Change-Id: If0281f96ce5dd29b04f190efa1527888bc240bb5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-03-01clk: msm: Add support for MSM clocksTaniya Das
Support added for MSM clock and modifications in the clk framework to use the MSM clock framework. Change-Id: Ibbcf0ffbf9d30dde2dcb0e943225ad95dd4e857d Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-03-01msm_defconfig: enable some regulator and qpnp driversAbhijeet Dharmapurikar
This change enables some regulator and qpnp drivers. Change-Id: Ic66cb1e9ed2d73a4f3f15b5bae0895c3c0aae808 Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-03-01gpio-usbdetect: use gpio instead of irqAbhijeet Dharmapurikar
The current driver uses irq_read_line api which is not standard. Instead use a gpio and register for an interrupt when it changes states. And upon a change in state interrupt is received, read the gpio state to determine whether it is high or low. Change-Id: Ie4b1226cedfb44e65a84349da4b3eef5fe988dff Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-03-01soc: spm: Snapshot of the SPM driver from 3.18 kernelAbhijeet Dharmapurikar
This is a snapshot of the SPM driver from 3.18 kernel. The upstream spm.c file is used as a idle driver. So updated spm driver from 3.18 kernel to msm-spm.c on 4.4 kernel. Change-Id: I73b020214fdcc7eb695cf8f5b52cf7885a0a10cd Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-01ARM: dts: msm: Update spmi devices to be platform devicesAbhijeet Dharmapurikar
Since the drivers have been updated to run on platform devices with new bindings, update their dtsi nodes to confirm to the new bindings. Change-Id: I709d38c90272e3159eb1cf92febb27328d70aff7 Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-03-01spmi_devices: change to platform_devicesAbhijeet Dharmapurikar
Change to using upstream spmi bus architecture. All the spmi devices, marked by spmi-dev-container, become platform devices. spmi-slave-container devices become spmi_devices each representing a slave. The read/write functions use regmap api's instead of calls to spmi_ext_register_read/write() implemented by the spmi bus. This regmap is instantiated per slave. The spmi bus helper functions like spmi_get_irq get changed to their platform bus equivalents. Change Kconfig files include * Remove dependence on OF_SPMI, MSM_QPNP_INT * There were few places where an earlier commit dcc2aedc80746acee589e4b47d3e6adf5d3ec253 missed adding dependence on SPMI along with MSM_SPMI. Fix them. * Add depends on ARCH_MSM. ARCH_MSM is used for internal builds. Change the nodes in DTSI files to confirm to the modified drivers. Update their binding docs to drop spmi-dev-container and spmi-slave-container; Finally update defconfig to use upstream SPMI. Change-Id: Ic85bff27c09c84b152cb38acbc3cadd05c0ec57a Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-03-01defconfig: arm64: msm: Enable RPM SMD DriverKarthikeyan Ramasubramanian
Enable RPM SMD Driver that implements the protocol to communicate with RPM processor for clock, regulator and power related voting. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01defconfig: arm64: msm: Enable G-LinkKarthikeyan Ramasubramanian
G-Link is a generic link-layer transport similar to SMD that supports a plug-in layer for the physical transport. This allows it to adapt to different physical transports such as shared memory, UARTs, buses, and DMA. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01defconfig: arm64: msm: Enable SMDKarthikeyan Ramasubramanian
Enable the SMD communication protocol between apps and other processors in the SoC. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01defconfig: arm64: msm: Enable SMEMKarthikeyan Ramasubramanian
Enable shared memory between the different processors in the SoC. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01defconfig: arm64: msm: Enable remote spinlocksKarthikeyan Ramasubramanian
Enable remote spinlocks to facilitate locking between the various processors in the SoC. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01defconfig: msm8996: enable RTB driverRunmin Wang
enable RTB driver and Function_Tracer, disable Debug_FS Change-Id: Icab1df530f320dc287d67a54844942797c2902c7
2016-03-01lib: iomap: Add MSM RTB supportRohit Vaswani
The ioread* and the iowrite* functions and not inlined and hence the RTB logs end up containing the ioread and iowrite functions themselves and not the ones invoking them. Add RTB support to the ioread*and iowrite* functions so that we can get meaningful RTB logs. Note that to avoid multiple RTB logs for ioread* and iowrite* functions, read*_no_log and write*_no_log macros are added. Change-Id: I2315d44c4dfbeee6be4a52f21bf4a20dd9508597 Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: David Keitel <dkeitel@codeaurora.org> Conflicts: arch/arm64/include/asm/io.h
2016-03-01msm: redefine __raw_{read, write}v for RTBXiaogang Cui
Redefine __raw_readv and __raw_writev for RTB support. Change-Id: Iae7b8e920abc4f23846690d3d1b3d1d933454788 Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org> [abhimany: fix trivial merge conflict] Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org> Conflicts: arch/arm64/include/asm/io.h
2016-03-01defconfig: msm8996: enable memory dump v2 driverRunmin Wang
Enable memory_dump_v2 driver Change-Id: I41c2b31ca291a1db1f3ae7f7e324b0d267b480f8
2016-03-01defconfig: msm8996: enable watchdog_v2 driverRunmin Wang
Enable watchdog_v2 driver. Change-Id: I3d017e85da0d9cfddca73cbecf21da96f20d0e14
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-03 21:29:20 +0000