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2010-08-04microblaze: Do not mix register saving and mode settingMichal Simek
Separate reg saving and mode setting. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move SAVE_STATE upwardMichal Simek
SAVE_STATE macro could be used by other rutines too. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: entry.S: Macro optimizationMichal Simek
We are not working with values from MSR that's why we can discard it and use r11 for different purpose without saving/restoring. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize hw exception rutineMichal Simek
Remove set_vms because UMS is cleared and VMS is already setup. Optimize function calling which save one additional instruction. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Implement clear_ums macro and fix SAVE_STATE macroMichal Simek
VMS is always setup because VM mode was before exception/syscall/interrupt. Kernel continues in kernel mode that's why we have to clear UMS bit if kernel comes from user space. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove additional setup for kernel_modeMichal Simek
PT_MODE stores information if kernel comes from user or kernel space. If come from user space, PT_MODE contains 0. If come from kernel store, PT_MODE contains non zero value. We don't need to save value 1. I am using r1 register which contains non zero value. This change save one additional instruction. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize SAVE_STATE macroMichal Simek
SAVE_STATE macro could be used for user_exception or interrupt functions. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove additional loadingMichal Simek
We don't need to save r0 to PT_R0. It could be additional operation. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Completely remove working with R11 registerMichal Simek
We don't need to save R11 register. There is easy way to use only R1 which is saved and restore later. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Do not setup BIP in _debug_exceptionMichal Simek
BIP is already setup. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Simplify _debug_exception functionMichal Simek
Keep together all arguments for send_sig function. Move returning address to delay slot which is executed. Remove additional send_sig loading. I am using IMM part of rtbd instruction with r0. old solution: addik r11, r0, send_sig rtbd r11, 0 nop new solution: rtbd r0, send_sig nop There is one instruction saving. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize SAVE_STATE macroMichal Simek
It is necessary to setup BIP and EE and clear EIP only for unaligned exception handler. The rest of hw exception handlers don't require it. HW exception occured and we are not in virtual mode. That's why we can do operations protected by EIP. Interrupt, next hw exception or syscall can't occur. EIP is cleared by rted. This change speedup page_fault hw exception handler which is critical path. There is also necessary to save R11 content before flag setup for unaligned exception. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: trivial: Use la insted of addikMichal Simek
la is translated to addik by toolchain. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: remove enable_irq from SAVE_STATE macroMichal Simek
SAVE_STATE macro is used in hw exceptions high level handling functions. Hw exception doesn't disable IRQ that's why we don't need to reenable it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move stack backup to SAVE_STATE macroMichal Simek
Remove code duplicity and move it to SAVE_STATE macro. There is no impact on performance. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Move BIP setup to the end of ret_from_trap/ret_from_excMichal Simek
We don't need to protect by BIP whole ret_from_trap/ret_from_exc code. Only restoring from user/hw exception should be covered. If BIP is setup, IRQ can't occur. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove PER_CPU(KM) variableMichal Simek
There is a way howto remove Kernel Mode variable. It is easier to parse UMS bit in MSR to find out if I come from kernel or user space. Loading MSR content should be in one cycle and loading PER_CPU variable depends on memory state. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Optimize clear_vms_ums macroMichal Simek
We can save two instruction when MSR_VMS and MSR_UMS are setup in one instruction. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Save and restore r3/r4 in SAVE/RESTORE_REGS macrosMichal Simek
Save and restore R3/R4 registers in macros. This change help to cleanup entry.S. In ret_from_trap function we are saving returning value from syscall to pt_regs on stack that's why we don't need to save and restore these values before kernel functions (schedule, do_signal). Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix VM_ON and VM_OFF macrosMichal Simek
Jump behind macro. We don't want to execute nop instruction again. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Do not use _start in vmlinuxMichal Simek
_start symbol stores physical address where kernel is. Gdb uses this symbol for their purpose that's why we have to rename it. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Cleanup boot/MakefileMichal Simek
Remove spaces and use tabs instead. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix number of pvr regsMichal Simek
Microblaze has only 11 pvr regs according manual. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Decrease time shifting valuesMichal Simek
Lower shifting values ensure that shifted 32bit counter value doesn't exceed 64bit cycle variable too fast. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Enable early printk only for uartliteMichal Simek
Microblaze has support for early printk. The second serial driver (uart16550/8250) has no microblaze support for early printk. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: remove unused HAVE_ARCH_PCI_SET_DMA_MASKFUJITA Tomonori
HAVE_ARCH_PCI_SET_DMA_MASK was removed in 2.6.34 (no architecture has the own implementation of pci_set_dma_mask). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Do not trace cpu_relax functionMichal Simek
IRQsoff tracer requires to protect cpu_idle function to get correct timing report. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Improve ftrace time measuringMichal Simek
I had to comment sched_clock generic function because of broken toolchain. It is fine grain timing. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Add stack unwinderSteven J. Magnani
Implement intelligent backtracing by searching for stack frame creation, and emitting only return addresses. Use print_hex_dump() to display the entire binary kernel stack. Limitation: MMU kernels are not currently able to trace beyond a system trap (interrupt, syscall, etc.). It is the intent of this patch to provide infrastructure that can be extended to add this capability later. Changes from V1: * Removed checks in find_frame_creation() that prevented location of the frame creation instruction in heavily optimized code * Various formatting/commenting/file location tweaks per review comments * Dropped Kconfig option to enable STACKTRACE as something logically separate Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
2010-08-04microblaze: Allow PAGE_SIZE configurationSteven J. Magnani
Allow developer to configure memory page size at compile time. Larger pages can improve performance on some workloads. Based on PowerPC code. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Trace hardirqsMichal Simek
Add trace_hardirqs_off and trace_hardirqs_on to do_IRQ function. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix sys_clone syscallMichal Simek
sys_clone syscall ignored args which this patch mapped to args which are passing from glibc. Here is the origin problem description. "I ran the static libgcc tests (very few of them are there, they are mostly dynamically linked) and some of them fail with an assertion in fork() system call (tid != pid), I looked at the microblaze/entry.S file and it looks suspicious (ignores arguments 3-5)" Arg mapping should be: glibc ARCH_FORK(...) -> do_fork(...) r5 -> r5 (clone_flags) r6 -> r6 (stack_start, use parent->stack if NULL) pt_regs -> r7 (pt_regs) r7 -> r8 (stack_size) r8 -> r9 (parent_tidptr) r9 -> r10 (child_tidptr) Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Fix copy_to_user_page macroMichal Simek
copy_to_user_page macro is used in mm/memory.c:access_process_vm function. This function is called from ptrace code (POKETEXT, POKEDATA) which write data to memory. Microblaze handle physical address for caches that's why there is virt_to_phys conversion. There is potential one location which can caused the problem on WB system. The important is take a look at write PTRACEs requests (POKE/TEXT, DATA, USR). Note: Majority of Microblaze PTRACE code is moved to generic location in newer kernel version that's why this solution should work on the newest kernel version too. linux/io.h is in cacheflush because of mm/nommu.c Tested on a WB system - hello world debugging. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Sync noMMU and MMU setup_memoryMichal Simek
Both versions can use the same node to register NODE_DATA(0) Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Remove unused labelMichal Simek
The label should be remove by 21e1c93631e027136ea4070e7bca600c4ad4f391 Warning message: arch/microblaze/mm/fault.c: In function 'do_page_fault': arch/microblaze/mm/fault.c:229: warning: label 'survive' defined but not used Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Implement flush_dcache_page macroMichal Simek
flush_dcache_page macro is necessary to implement for JFFS2 rootfs support on WB system. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-02microblaze: Fix comment for TLBMichal Simek
There is wrong comment for TLB. Early printk uartlite console uses TLB 63. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-02microblaze: Fix __copy_to/from_user_inatomic macrosMichal Simek
__copy_to/from_user_inatomic should call __copy_to/from_user because there is not necessary to check access because of kernel function. might_sleep in copy_to/from_user macros is causing problems in debug sessions too (CONFIG_DEBUG_SPINLOCK_SLEEP). BUG: sleeping function called from invalid context at .../arch/microblaze/include/asm/uaccess.h:388 in_atomic(): 1, irqs_disabled(): 0, pid: 1, name: swapper 1 lock held by swapper/1: #0: (&p->cred_guard_mutex){......}, at: [<c00d4b90>] prepare_bprm_creds+0x2c/0x88 Kernel Stack: ... Call Trace: [<c0006bd4>] microblaze_unwind+0x7c/0x94 [<c0006684>] show_stack+0xf4/0x190 [<c0006730>] dump_stack+0x10/0x30 [<c00103a0>] __might_sleep+0x12c/0x160 [<c0090de4>] file_read_actor+0x1d8/0x2a8 [<c0091568>] generic_file_aio_read+0x6b4/0xa64 [<c00cd778>] do_sync_read+0xac/0x110 [<c00ce254>] vfs_read+0xc8/0x160 [<c00d585c>] kernel_read+0x38/0x64 [<c00d5984>] prepare_binprm+0xfc/0x130 [<c00d6430>] do_execve+0x228/0x370 [<c000614c>] microblaze_execve+0x58/0xa4 caused by file_read_actor (mm/filemap.c) which calls __copy_to_user_inatomic. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-07-30Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* master.kernel.org:/home/rmk/linux-2.6-arm: cyber2000fb: fix console in truecolor modes cyber2000fb: fix machine hang on module load SA1111: Eliminate use after free ARM: Fix Versatile/Realview/VExpress MMC card detection sense ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt ARM: Add barriers to io{read,write}{8,16,32} accessors as well ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE ARM: 6272/1: Convert L2x0 to use the IO relaxed operations ARM: 6271/1: Introduce *_relaxed() I/O accessors ARM: 6275/1: ux500: don't use writeb() in uncompress.h ARM: 6270/1: clean files in arch/arm/boot/compressed/ ARM: Fix csum_partial_copy_from_user()
2010-07-30SA1111: Eliminate use after freeJulia Lawall
__sa1111_remove always frees its argument, so the subsequent reference to sachip->saved_state represents a use after free. __sa1111_remove does not appear to use the saved_state field, so the patch simply frees it first. A simplified version of the semantic patch that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E,E2; @@ __sa1111_remove(E) ... ( E = E2 | * E ) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-30ARM: Fix Versatile/Realview/VExpress MMC card detection senseRussell King
The MMC card detection sense has become really confused with negations at various levels, leading to some platforms not detecting inserted cards. Fix this by converting everything to positive logic throughout, thereby getting rid of these negations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-30ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_viptGary King
smp_processor_id() must not be called from a preemptible context (this is checked by CONFIG_DEBUG_PREEMPT). kmap_high_l1_vipt() was doing so. This lead to a problem where the wrong per_cpu kmap_high_l1_vipt_depth could be incremented, causing a BUG_ON(*depth <= 0); in kunmap_high_l1_vipt(). The solution is to move the call to smp_processor_id() after the call to preempt_disable(). Originally by: Andrew Howe <ahowe@nvidia.com> Signed-off-by: Gary King <gking@nvidia.com> Acked-by: Nicolas Pitre <nico.as.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds
* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] etr: fix clock synchronization race [S390] Fix IRQ tracing in case of PER
2010-07-29ARM: Add barriers to io{read,write}{8,16,32} accessors as wellRussell King
The ioread/iowrite accessors also need barriers as they're used in place of readl/writel et.al. in portable drivers. Create __iormb() and __iowmb() which are conditionally defined to be barriers dependent on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLECatalin Marinas
When the coherent DMA buffers are mapped as Normal Non-cacheable (ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered with Device memory accesses causing failures in device drivers that do not use the mandatory memory barriers before starting a DMA transfer. LKML discussions led to the conclusion that such barriers have to be added to the I/O accessors: http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153 http://thread.gmane.org/gmane.linux.ide/46414 http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250 This patch introduces a wmb() barrier to the write*() I/O accessors to handle the situations where Normal Non-cacheable writes are still in the processor (or L2 cache controller) write buffer before a DMA transfer command is issued. For the read*() accessors, a rmb() is introduced after the I/O to avoid speculative loads where the driver polls for a DMA transfer ready bit. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29ARM: 6272/1: Convert L2x0 to use the IO relaxed operationsCatalin Marinas
This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Since the mandatory barriers may do an L2 cache sync, this patch avoids a recursive call into l2x0_cache_sync() via the write*() accessors and wmb() and a call into l2x0_cache_sync() with the l2x0_lock held. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29ARM: 6271/1: Introduce *_relaxed() I/O accessorsCatalin Marinas
This patch introduces readl*_relaxed()/write*_relaxed() as the main I/O accessors (when __mem_pci is defined). The standard read*()/write*() macros are now based on the relaxed accessors. This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29ARM: 6275/1: ux500: don't use writeb() in uncompress.hRabin Vincent
Don't use writeb() in uncompress.h, to avoid the following build errors when the "Add barriers to the I/O accessors" series is applied. Use __raw_writeb() instead. arch/arm/boot/compressed/misc.o: In function `putc': arch/arm/mach-ux500/include/mach/uncompress.h:41: undefined reference to `outer_cache' Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-29ARM: 6270/1: clean files in arch/arm/boot/compressed/Magnus Damm
Update the compressed boot Makefile for ARM to remove files during clean. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-07-28Merge branch 'for_linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb * 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb: x86,kgdb: Fix hw breakpoint regression
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