| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-06-18 | clk: keystone: add support for post divider register for main pll | Murali Karicheri |
| 2014-02-10 | clk: keystone: gate: fix clk_init_data initialization | Ivan Khoronzhuk |
| 2013-12-10 | clk: keystone: gate: fix error handling on init | Grygorii Strashko |
| 2013-12-10 | clk: keystone: use clkod register bits for postdiv | Murali Karicheri |
| 2013-10-07 | clk: keystone: Build Keystone clock drivers | Santosh Shilimkar |
| 2013-10-07 | clk: keystone: Add gate control clock driver | Santosh Shilimkar |
| 2013-10-07 | clk: keystone: add Keystone PLL clock driver | Santosh Shilimkar |
 |
index : android_kernel_xiaomi_sdm660.git | |
| Unnamed repository; edit this file 'description' to name the repository. | Rafael Marcalo |
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