| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-05-12 | clk: socfpga: add divider registers to the main pll outputs | Dinh Nguyen |
| 2014-02-18 | clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk" | Dinh Nguyen |
| 2014-02-18 | clk: socfpga: split clk code | Steffen Trumtrar |
 |
index : android_kernel_xiaomi_sdm660.git | |
| Unnamed repository; edit this file 'description' to name the repository. | Rafael Marcalo |
| summaryrefslogtreecommitdiff |