summaryrefslogtreecommitdiff
path: root/drivers/dma
AgeCommit message (Collapse)Author
2014-05-21dma: remove DEFINE_PCI_DEVICE_TABLE macroJingoo Han
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro is deprecated. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: ste_dma40: Convert to the late system PM callbacksUlf Hansson
Clients may still be active in the early phase of system PM, thus we need to move the suspend operations to the late system PM phase. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: mmp_pdma: add support for residue reportingDaniel Mack
A channel can accommodate more than one transaction, each consisting of multiple descriptors, the last of which has the DCMD_ENDIRQEN bit set. In order to report the channel's residue, we hence have to walk the list of running descriptors, look for those which match the cookie, and then try to find the descriptor which defines upper and lower boundaries that embrace the current transport pointer. Once it is found, walk forward until we find the descriptor that tells us about the end of a transaction via a set DCMD_ENDIRQEN bit. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: ste_dma40: Fixup system suspend/resumeUlf Hansson
Make sure to handle register context save/restore when needed from system PM callbacks. Previously we solely trusted the device to reside in in-active state while the system suspend callback were invoked, which is just too optimistic. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: ste_dma40: Convert to PM macros while providing the PM callbacksUlf Hansson
Converting to the PM macros makes us simplify and remove some code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: ste_dma40: Don't require CONFIG_PM_RUNTIMEUlf Hansson
While probing, don't rely on CONFIG_PM_RUNTIME to be configured. Instead, let's power up the device and make it fully operational. Update the runtime PM status to reflect the active state. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dma: ste_dma40: Maintain spinlock order while handling pauseUlf Hansson
The runtime PM resume callback needs to be executed while holding the spinlock, make sure to maintain this for the pause operation as well. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dmaengine: dw: convert to use SET_LATE_SYSTEM_SLEEP_PM_OPSAndy Shevchenko
The commit 4501fe61 "dma: dw: Add suspend and resume handling for PCI mode DW_DMAC." introduces system power management callbacks. Regarding to commit f78c4cff "PM / Sleep: Add macro to define common late/early system PM callbacks" we have nice macro to setup dev_pm_ops structure. This patch converts a driver to use the macro. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-07dmaengine: dw: move PM to suspend_late / resume_early stagesAndy Shevchenko
There is no need to use *_noirq version of suspend and resume PM callbacks. The suspend_late / resume_early suit better (it was discussed in [1]) and in future could be used for runtime PM support. [1] http://www.spinics.net/lists/kernel/msg1650974.html Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02dma: mpc512x: fix freeing resources in mpc_dma_probe() and mpc_dma_remove()Alexander Popov
Fix mpc_dma_probe() error path and mpc_dma_remove(): manually free IRQs and dispose IRQ mappings before devm_* takes care of other resources. Moreover replace devm_request_irq() with request_irq() since there is no need to use it because the original code always frees IRQ manually with devm_free_irq(). Replace devm_free_irq() with free_irq() accordingly. Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02dma: mpc512x: separate 'compatible' values for MPC512x and MPC8308Alexander Popov
MPC512x and MPC8308 have similar DMA controllers, but are independent SoCs. DMA controller driver should have separate 'compatible' values for these SoCs. Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02dma: mpc512x: reorder mpc8308 specific instructionsAlexander Popov
Concentrate the specific code for MPC8308 in the 'if' branch and handle MPC512x in the 'else' branch. This modification only reorders instructions but doesn't change behaviour. Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: Freescale: move functions to avoid forward declarationsHongbo Zhang
These functions will be modified in the next patch in the series. By moving the function in a patch separate from the changes, it will make review easier. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Qiang Liu <qiang.liu@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: Freescale: add fsl_dma_free_descriptor() to reduce code duplicationHongbo Zhang
There are several places where descriptors are freed using identical code. This patch puts this code into a function to reduce code duplication. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Qiang Liu <qiang.liu@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: Freescale: remove attribute DMA_INTERRUPT of dmaengineHongbo Zhang
Delete attribute DMA_INTERRUPT because fsldma doesn't support this function, exception will be thrown if talitos is used to offload xor at the same time. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Qiang Liu <qiang.liu@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: Freescale: unify register access methodsHongbo Zhang
Methods of accessing DMA controller registers are inconsistent, some registers are accessed by DMA_IN/OUT directly, while others are accessed by functions get/set_* which are wrappers of DMA_IN/OUT, and even for the BCR register, it is read by get_bcr but written by DMA_OUT. This patch unifies the inconsistent methods, all registers are accessed by get/set_* now. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: Freescale: remove the unnecessary FSL_DMA_LD_DEBUGHongbo Zhang
Some codes are calling chan_dbg with FSL_DMA_LD_DEBUG surrounded, it is really unnecessary to use such a macro because chan_dbg is a wrapper of dev_dbg, we do have corresponding DEBUG macro to switch on/off dev_dbg, and most of the other codes are also calling chan_dbg directly without using FSL_DMA_LD_DEBUG. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: shdma: add cyclic transfer supportKuninori Morimoto
This patch add cyclic transfer support and enables dmaengine_prep_dma_cyclic() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [reflown changelog for readablity] Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02DMA: shdma: tidyup callback chunk finderKuninori Morimoto
Current shdma is using "last" which indicates last desc which needs to have callback function. But that desc's chunks is always 1, we can use it as finder Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [reflown changelog for readablity] Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02dma: mmp_pdma: Fix physical channel memory allocation sizeLaurent Pinchart
Use sizeof(*var) instead of sizeof(type) when calling devm_k*alloc(). This avoids using the wrong type as was done to allocate the physical channels array. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-05-02dma: mmp_pdma: Simplify access to channel drcmr valueLaurent Pinchart
As the physical channel and virtual channel point to each other, pchan->phy->vchan is always equal to pchan. Simplify the code accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: update DMA memcpy to use new param elementJoel Fernandes
edma param struct is now within an edma_pset struct introduced in Thomas Gleixner's edma tx status series. Update memcpy function for the same. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Document variables used for residue accountingJoel Fernandes
The granular residue accounting code uses certain variables specifically for residue accounting. Document these in the structure declaration. Also move around some elements and group them together. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Provide granular accountingThomas Gleixner
The first slot in the ParamRAM of EDMA holds the current active subtransfer. Depending on the direction we read either the source or the destination address from there. In the internal psets we have the address of the buffer(s). In the cyclic case we only use the internal pset[0] which holds the start address of the circular buffer and calculate the remaining room to the end of the buffer. In the SG case we read the current address and compare it to the internal psets address and length. - If the current address is outside of this range, the pset has been processed already and we mark it done, update the residue_stat value and process the next set. That avoids that we need to walk all processed psets for every invocation of tx_status. - If its inside the range we know that we look at the current active set and stop the walk. - In case of intermediate transfers we update the stats in the interrupt callback function before starting the next batch of transfers. The tx_status callback and the interrupt callback are serialized via vchan.lock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [joelf@ti.com: Hunk #2 in original patch manually applied] Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Store transfer data in edma_desc and edma_psetThomas Gleixner
For granular accounting we need to store the direction and the information for the individual psets: - source or destination address, depending on direction - length Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Create private pset structThomas Gleixner
Preparatory patch to support finer grained accounting. Move the edma_params array out of edma_desc so we can add further per pset data to it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [joelf@ti.com: Fixed up hunk #3 in original patch to apply] Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Check the current decriptor first in tx_status()Thomas Gleixner
It's likely that the caller investigates the status of a currently active descriptor. Make that simple check first and only rumage in the vchan list if that fails. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30dmaengine: edma: Sanitize residue reportingThomas Gleixner
The residue reporting in edma_tx_status() is just broken. It blindly walks the psets and recalculates the lenght of the transfer from the hardware parameters. For cyclic transfers it adds the link pset, which results in interestingly large residues. For non-cyclic it adds the dummy pset, which is stupid as well. Aside of that it's silly to walk through the pset params when the per descriptor residue is known at the point of creating it. Store the information in edma_desc and use it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-29dmaengine: edma: Add channel number to debug printsPeter Ujfalusi
It helps to identify issues if we have some information regarding to the channel which the event is associated. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-23dmaengine: edma: No need save/restore interrupt flags during spin_lock in IRQJoel Fernandes
The vchan lock in edma_callback is acquired in hard interrupt context. As interrupts are already disabled, there's no point in save/restoring interrupt mask bit or cpsr flags. Get rid of flags local variable and use spin_lock instead of spin_lock_irqsave. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Add DMA memcpy supportJoel Fernandes
We add DMA memcpy support to EDMA driver. Successful tests performed using dmatest kernel module. Copy alignment is set to DMA_SLAVE_BUSWIDTH_4_BYTES and users must ensure length is aligned so that copy is performed fully. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Print the direction value as well when it is not supportedPeter Ujfalusi
In case of not supported direction it is better to print the direction also. It is unlikely, but in such an event it helps with the debugging. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Prefix debug prints where the text were identical in prep ↵Peter Ujfalusi
callbacks prep_slave_sg and prep_dma_cyclic callbacks have mostly same failure cases with the same texts printed in case we hit them. It helps when debugging if we know exactly which callback generated the errors. At the same time change the debug level for descriptor allocation failure from dbg to err since all other error cases are dev_err and this failure is similarly fatal as the other ones. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Implement device_slave_caps callbackPeter Ujfalusi
With the callback implemented omap-dma can provide information to client drivers regarding to supported address widths, directions, residue granularity, etc. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Reduce debug print verbosity for non verbose debuggingPeter Ujfalusi
Do not print the paRAM information when verbose debugging is not asked and also reduce the number of lines printed in edma_prep_dma_cyclic() Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Set DMA_CYCLIC capability flagPeter Ujfalusi
Indicate that the edma dmaengine driver has support for cyclic mode. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Add support for DMA_PAUSE/RESUME operationPeter Ujfalusi
Pause/Resume can be used by the audio stack when the stream is paused/resumed The edma platform code has support for this and the legacy audio stack used this. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-22dmaengine: edma: Correct the handling of src/dst_maxburst == 0Peter Ujfalusi
When clients asks for maxburst = 0 it is basically the same case as if they were asking for maxburst = 1 since in both case ASYNC need to be used and the eDMA is expected to write/read one word per DMA request. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-16dma: fix eDMA driver as a subsys_initcallYuan Yao
Because of some driver base on DMA, changed the initcall order as subsys_initcall. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-16dmaengine: sirf: off by one in of_dma_sirfsoc_xlate()Dan Carpenter
The ">" here should be ">=" or we are one step beyond the end of the sdma->channels[] array. Fixes: 2e041c94628c ('dmaengine: sirf: enable generic dt binding for dma channels') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-16platform: Fix timberdale dependenciesJean Delvare
VIDEO_TIMBERDALE selects TIMB_DMA which itself depends on MFD_TIMBERDALE, so VIDEO_TIMBERDALE should either select or depend on MFD_TIMBERDALE as well. I chose to make it depend on it because I think it makes more sense and it is consistent with what other options are doing. Adding a "|| HAS_IOMEM" to the TIMB_DMA dependencies silenced the kconfig warning about unmet direct dependencies but it was wrong: without MFD_TIMBERDALE, TIMB_DMA is useless as the driver has no device to bind to. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Mauro Carvalho Chehab <m.chehab@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-14dma: edma: fix incorrect SG list handlingSekhar Nori
The code to handle any length SG lists calls edma_resume() even before edma_start() is called. This is incorrect because edma_resume() enables edma events on the channel after which CPU (in edma_start) cannot clear posted events by writing to ECR (per the EDMA user's guide). Because of this EDMA transfers fail to start if due to some reason there is a pending EDMA event registered even before EDMA transfers are started. This can happen if an EDMA event is a byproduct of device initialization. Fix this by calling edma_resume() only if it is not the first batch of MAX_NR_SG elements. Without this patch, MMC/SD fails to function on DA850 EVM with DMA. The behaviour is triggered by specific IP and this can explain why the issue was not reported before (example with MMC/SD on AM335x). Tested on DA850 EVM and AM335x EVM-SK using MMC/SD card. Cc: stable@vger.kernel.org # v3.12.x+ Cc: Joel Fernandes <joelf@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Tested-by: Jon Ringle <jringle@gridpoint.com> Tested-by: Alexander Holler <holler@ahsoftware.de> Reported-by: Jon Ringle <jringle@gridpoint.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-10Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds
Pull slave-dmaengine updates from Vinod Koul: - New driver for Qcom bam dma - New driver for RCAR peri-peri - New driver for FSL eDMA - Various odd fixes and updates thru the subsystem * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits) dmaengine: add Qualcomm BAM dma driver shdma: add R-Car Audio DMAC peri peri driver dmaengine: sirf: enable generic dt binding for dma channels dma: omap-dma: Implement device_slave_caps callback dmaengine: qcom_bam_dma: Add device tree binding dma: dw: Add suspend and resume handling for PCI mode DW_DMAC. dma: dw: allocate memory in two stages in probe Add new line to test result strings produced in verbose mode dmaengine: pch_dma: use tasklet_kill in teardown dmaengine: at_hdmac: use tasklet_kill in teardown dma: cppi41: start tear down only if channel is busy usb: musb: musb_cppi41: Dont reprogram DMA if tear down is initiated dmaengine: s3c24xx-dma: make phy->irq signed for error handling dma: imx-dma: Add missing module owner field dma: imx-dma: Replace printk with dev_* dma: fsl-edma: fix static checker warning of NULL dereference dma: Remove comment about embedding dma_slave_config into custom structs dma: mmp_tdma: move to generic device tree binding dma: mmp_pdma: add IRQF_SHARED when request irq dma: edma: Fix memory leak in edma_prep_dma_cyclic() ...
2014-04-05Merge branch 'topic/bam' into for-linusVinod Koul
Conflicts: drivers/dma/Makefile Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-05dmaengine: add Qualcomm BAM dma driverAndy Gross
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller found in the MSM 8x74 platforms. Each BAM DMA device is associated with a specific on-chip peripheral. Each channel provides a uni-directional data transfer engine that is capable of transferring data between the peripheral and system memory (System mode), or between two peripherals (BAM2BAM). The initial release of this driver only supports slave transfers between peripherals and system memory. Signed-off-by: Andy Gross <agross@codeaurora.org> Tested-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-04Merge branch 'devel-stable' into for-nextRussell King
2014-04-04dmaengine: omap-dma: more consolidation of CCR register setupRussell King
We can move the handling of the DMA synchronisation control out of the prepare functions; this can be pre-calculated when the DMA channel has been allocated, so we don't need to duplicate this in both prepare functions. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-04dmaengine: omap-dma: move IRQ handling to omap-dmaRussell King
Move the interrupt handling for OMAP2+ into omap-dma, rather than using the legacy support in the platform code. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-04dmaengine: omap-dma: move register read/writes into omap-dma.cRussell King
Export the DMA register information from the SoC specific data, such that we can access the registers directly in omap-dma.c, mapping the register region ourselves as well. Rather than calculating the DMA channel register in its entirety for each access, we pre-calculate an offset base address for the allocated DMA channel and then just use the appropriate register offset. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-04-04dmaengine: omap-dma: cleanup errata 3.3 handlingRussell King
Provide a function to read the CSAC/CDAC register, working around the OMAP 3.2/3.3 erratum (which requires two reads of the register if the first returned zero. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-10 03:27:13 +0000