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path: root/drivers/edac
AgeCommit message (Expand)Author
2010-05-10i7core_edac: Use a lockless ringbufferMauro Carvalho Chehab
2010-05-10edac: Create an unique instance for each kobjMauro Carvalho Chehab
2010-05-10i7core_edac: Convert UDIMM error counters into a proper sysfs groupMauro Carvalho Chehab
2010-05-10edac: Don't create csrow entries on instance groupsMauro Carvalho Chehab
2010-05-10edac: store/show methods for device groups weren't workingMauro Carvalho Chehab
2010-05-10i7core_edac: Add support for sysfs addrmatch groupMauro Carvalho Chehab
2010-05-10edac_core: Allow the creation of sysfs groupsMauro Carvalho Chehab
2010-05-10i7core_edac: Avoid printing a warning when debug is disabledMauro Carvalho Chehab
2010-05-10i7core_edac: We need to use list_for_each_entry_safe to avoid errorsMauro Carvalho Chehab
2010-05-10i7core_edac: change remove module strategyMauro Carvalho Chehab
2010-05-10i7core_edac: remove static counter for max socketsMauro Carvalho Chehab
2010-05-10i7core_edac: at remove, don't remove all pci devices at onceMauro Carvalho Chehab
2010-05-10i7core_edac: Fix a bug when printing error counts with RDIMMsMauro Carvalho Chehab
2010-05-10i7core_edac: a few fixes for multiple mc'sMauro Carvalho Chehab
2010-05-10i7core_edac: sanity check: print a warning if a mcelog is ignoredMauro Carvalho Chehab
2010-05-10i7core_edac: create one mc per socket/QPIMauro Carvalho Chehab
2010-05-10Dynamically allocate memory for PCI devicesMauro Carvalho Chehab
2010-05-10i7core: temporary workaround to allow it to compile against 2.6.30Mauro Carvalho Chehab
2010-05-10i7core_edac: Improve corrected_error_counts output for RDIMMMauro Carvalho Chehab
2010-05-10i7core_edac: Probe on Xeons earilerKeith Mannthey
2010-05-10i7core: Use registered memories per processorMauro Carvalho Chehab
2010-05-10i7core_edac: Use Device 3 function 2 to report errors with RDIMM'sMauro Carvalho Chehab
2010-05-10i7core_edac: Fix ecc enable shiftKeith Mannthey
2010-05-10i7core_edac: Print an error message if pci register failsMauro Carvalho Chehab
2010-05-10i7core_edac: CodingSyle fixes/cleanupsMauro Carvalho Chehab
2010-05-10i7core_edac: fix error injectionMauro Carvalho Chehab
2010-05-10i7core_edac: fix error codes for sysfs error injection interfaceMauro Carvalho Chehab
2010-05-10i7core_edac: some fixes at error injection codeMauro Carvalho Chehab
2010-05-10i7core_edac: Some cleanups at displayed infoMauro Carvalho Chehab
2010-05-10i7core: remove some uneeded noisy debug messagesMauro Carvalho Chehab
2010-05-10i7core: add socket info at the debug msgMauro Carvalho Chehab
2010-05-10i7core: better document i7core_get_active_channels()Mauro Carvalho Chehab
2010-05-10i7core: fix get_devices routine for Xeon55xxMauro Carvalho Chehab
2010-05-10i7core: enrich error information based on memory transaction typeMauro Carvalho Chehab
2010-05-10i7core: check if the memory error is fatal or non-fatalMauro Carvalho Chehab
2010-05-10i7core: fix probing on Xeon55xxMauro Carvalho Chehab
2010-05-10i7core_edac: some fixes at memory error parserMauro Carvalho Chehab
2010-05-10i7core_edac: decode mcelog error and send it via edac interfaceMauro Carvalho Chehab
2010-05-10i7core_edac: maps all sockets as if ther are one MC controllerMauro Carvalho Chehab
2010-05-10i7core_edac: add support for more than one MC socketMauro Carvalho Chehab
2010-05-10i7core_edac: Add a code to probe Xeon 55xx busMauro Carvalho Chehab
2010-05-10i7core_edac: Adds write unlock to MC registersMauro Carvalho Chehab
2010-05-10i7core_edac: Add edac_mce glueMauro Carvalho Chehab
2010-05-10edac/Kconfig: edac_mce can't be moduleMauro Carvalho Chehab
2010-05-10edac_mce: Add an interface driver to report mce errors via edacMauro Carvalho Chehab
2010-05-10i7core_edac: CodingStyle fixesMauro Carvalho Chehab
2010-05-10i7core_edac: fill csrows edac sysfs infoMauro Carvalho Chehab
2010-05-10i7core_edac: Memory info fixes and preparation for properly filling cswrow dataMauro Carvalho Chehab
2010-05-10i7core_edac: Get more info about the memory DIMMsMauro Carvalho Chehab
2010-05-10i7core_edac: Add more information about each active dimmMauro Carvalho Chehab
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