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2014-08-04Merge branch 'x86-ras-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull RAS updates from Ingo Molnar: "The main changes in this cycle are: - RAS tracing/events infrastructure, by Gong Chen. - Various generalizations of the APEI code to make it available to non-x86 architectures, by Tomasz Nowicki" * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ras: Fix build warnings in <linux/aer.h> acpi, apei, ghes: Factor out ioremap virtual memory for IRQ and NMI context. acpi, apei, ghes: Make NMI error notification to be GHES architecture extension. apei, mce: Factor out APEI architecture specific MCE calls. RAS, extlog: Adjust init flow trace, eMCA: Add a knob to adjust where to save event log trace, RAS: Add eMCA trace event interface RAS, debugfs: Add debugfs interface for RAS subsystem CPER: Adjust code flow of some functions x86, MCE: Robustify mcheck_init_device trace, AER: Move trace into unified interface trace, RAS: Add basic RAS trace event x86, MCE: Kill CPU_POST_DEAD
2014-08-04Merge tag 'pci-v3.17-changes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "I'll be on vacation until Aug 11, and I suspect the merge window will open before then, so I'm sending this to you early. There are more things I'd like to get into v3.17, so I hope to send another pull request soon after I return. The most notable pieces here are: - Support BARs up to 128GB (up from 8GB) - Fix SR-IOV resource assignment when we fail to expand a resource - Rework pciehp to handle a common hardware erratum - Cleanup MSI - Fix NIC renaming issue - Fix VGA default device issue on EFI systems - Fix ASPM configuration (previously we didn't enable it as expected) Alex Williamson has graciously agreed to take care of any major issues with this if you take it before I return. Details: Resource management - Support BAR sizes up to 128GB (Yinghai Lu) - Keep original resource if we fail to expand it (Guo Chao) - Return conventional error values from pci_revert_fw_address() (Bjorn Helgaas) - Tidy resource assignment messages (Bjorn Helgaas) - Don't exclude low BIOS area for non-PCI cards (Christoph Schulz) PCI device hotplug - Prevent NULL dereference during pciehp probe (Andreas Noever) - Make pciehp pcie_wait_cmd() self-contained (Bjorn Helgaas) - Wait for pciehp hotplug command completion lazily (Bjorn Helgaas) - Compute pciehp timeout from hotplug command start time (Bjorn Helgaas) - Remove pciehp assumptions about which commands cause completion events (Bjorn Helgaas) - Clear pciehp Data Link Layer State Changed during init (Myron Stowe) - Remove pciehp struct controller.no_cmd_complete (Rajat Jain) - Remove cpqphp unnecessary null test (Fabian Frederick) - Remove "invalid IRQ" warning for hot-added PCIe ports (Jiang Liu) IOMMU - Add DMA alias quirk for Intel 82801 bridge (Alex Williamson) MSI - Add internal msix_clear_and_set_ctrl() (Yijing Wang) - Remove unused msi_enabled_mask() (Yijing Wang) - Cache Multiple Message Capable in struct msi_desc (Yijing Wang) - Add msi_setup_entry() to clean up initialization (Yijing Wang) - Remove unused msi_remove_pci_irq_vectors() (Yijing Wang) - Retrieve first MSI IRQ from msi_desc rather than pci_dev (Yijing Wang) - Remove unused list access in __pci_restore_msix_state() (Yijing Wang) - Use irq_get_msi_desc() to simplify code (Yijing Wang) Generic host bridge driver - Fix GPL v2 license string typo (Bjorn Helgaas) Marvell MVEBU - Fix GPL v2 license string typo (Thierry Reding) NVIDIA Tegra - Use correct initial HW settings (Phil Edworthy) - Remove rcar_pcie_setup_window() resource argument (Phil Edworthy) - Fix GPL v2 license string typo (Thierry Reding) Renesas R-Car - Remove redundant config accessor register checks (Sergei Shtylyov) - Fix GPL v2 license string typo (Bjorn Helgaas) Virtualization - Factor secondary bus reset logic (Gavin Shan) - Remove duplicate powerpc reset logic (Gavin Shan) Miscellaneous - Rework default VGA detection for EFI (Bruno Prémont) - Fix sysfs "acpi_index" and "label" errors for NIC renaming (Simone Gotti) - Configure ASPM at pci_enable_device()-time (Vidya Sagar) - Add include/linux/pci_ids.h include guard (Rasmus Villemoes)" * tag 'pci-v3.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (38 commits) PCI/MSI: Use irq_get_msi_desc() to simplify code PCI/MSI: Remove unused list access in __pci_restore_msix_state() PCI/MSI: Retrieve first MSI IRQ from msi_desc rather than pci_dev PCI/MSI: Remove unused function msi_remove_pci_irq_vectors() PCI/MSI: Add msi_setup_entry() to clean up MSI initialization PCI: Configure ASPM when enabling device x86: don't exclude low BIOS area when allocating address space for non-PCI cards PCI: generic: Fix GPL v2 license string typo PCI: rcar: Fix GPL v2 license string typo PCI: tegra: Fix GPL v2 license string typo PCI: mvebu: Fix GPL v2 license string typo PCI: Add include guard to include/linux/pci_ids.h x86, ia64: Move EFI_FB vga_default_device() initialization to pci_vga_fixup() PCI: Tidy resource assignment messages PCI: Return conventional error values from pci_revert_fw_address() PCI: Cleanup control flow PCI: Support BAR sizes up to 128GB PCI: cpqphp: Remove unnecessary null test before debugfs_remove() PCI: pciehp: Clear Data Link Layer State Changed during init PCI: Add bridge DMA alias quirk for Intel 82801 bridge ...
2014-07-30Merge tag 'please-pull-apei' into x86/rasH. Peter Anvin
APEI is currently implemented so that it depends on x86 hardware. The primary dependency is that GHES uses the x86 NMI for hardware error notification and MCE for memory error handling. These patches remove that dependency. Other APEI features such as error reporting via external IRQ, error serialization, or error injection, do not require changes to use them on non-x86 architectures. The following patch set eliminates the APEI Kconfig x86 dependency by making these changes: - treat NMI notification as GHES architecture - HAVE_ACPI_APEI_NMI - group and wrap around #ifdef CONFIG_HAVE_ACPI_APEI_NMI code which is used only for NMI path - identify architectural boxes and abstract it accordingly (tlb flush and MCE) - rework ioremap for both IRQ and NMI context NMI code is kept in ghes.c file since NMI and IRQ context are tightly coupled. Note, these patches introduce no functional changes for x86. The NMI notification feature is hard selected for x86. Architectures that want to use this feature should also provide NMI code infrastructure.
2014-07-16Merge branches 'pci/host-generic', 'pci/host-mvebu', 'pci/host-rcar', ↵Bjorn Helgaas
'pci/host-tegra', 'pci/msi', 'pci/misc', 'pci/resource' and 'pci/virtualization' into next * pci/host-generic: PCI: generic: Fix GPL v2 license string typo * pci/host-mvebu: PCI: mvebu: Fix GPL v2 license string typo * pci/host-rcar: PCI: rcar: Fix GPL v2 license string typo * pci/host-tegra: PCI: tegra: Fix GPL v2 license string typo * pci/msi: PCI/MSI: Use irq_get_msi_desc() to simplify code PCI/MSI: Remove unused list access in __pci_restore_msix_state() PCI/MSI: Retrieve first MSI IRQ from msi_desc rather than pci_dev PCI/MSI: Remove unused function msi_remove_pci_irq_vectors() PCI/MSI: Add msi_setup_entry() to clean up MSI initialization * pci/misc: PCI: Configure ASPM when enabling device x86: don't exclude low BIOS area when allocating address space for non-PCI cards PCI: Add include guard to include/linux/pci_ids.h x86, ia64: Move EFI_FB vga_default_device() initialization to pci_vga_fixup() * pci/resource: PCI: Tidy resource assignment messages PCI: Return conventional error values from pci_revert_fw_address() PCI: Cleanup control flow PCI: Support BAR sizes up to 128GB PCI: Keep original resource if we fail to expand it * pci/virtualization: powerpc/pci: Remove duplicate logic PCI: Make resetting secondary bus logic common
2014-07-16PCI/MSI: Use irq_get_msi_desc() to simplify codeYijing Wang
Use irq_get_msi_desc() to get MSI IRQ related msi_desc directly instead of searching the dev->msi_list. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-16PCI/MSI: Remove unused list access in __pci_restore_msix_state()Yijing Wang
In __pci_restore_msix_state(), we get the first element from msi_list, but we never use it. Remove this useless code. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-16PCI/MSI: Retrieve first MSI IRQ from msi_desc rather than pci_devYijing Wang
Retrieve the first MSI IRQ to compute the MSI index from struct msi_desc rather than the struct pci_dev to avoid an additional memory access. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-16PCI/MSI: Remove unused function msi_remove_pci_irq_vectors()Yijing Wang
msi_remove_pci_irq_vectors() is unused, so remove it. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-16PCI/MSI: Add msi_setup_entry() to clean up MSI initializationYijing Wang
Move MSI entry stuff to a new function, msi_setup_entry(), to simplify msi_capability_init() as MSI-X does. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-16PCI: Configure ASPM when enabling deviceVidya Sagar
We can't do ASPM configuration at enumeration-time because enabling it makes some defective hardware unresponsive, even if ASPM is disabled later (see 41cd766b0659 ("PCI: Don't enable aspm before drivers have had a chance to veto it"). Therefore, we have to do it after a driver claims the device. We previously configured ASPM in pci_set_power_state(), but that's not a very good place because it's not really related to setting the PCI device power state, and doing it there means: - We incorrectly skipped ASPM config when setting a device that's already in D0 to D0. - We unnecessarily configured ASPM when setting a device to a low-power state (the ASPM feature only applies when the device is in D0). - We unnecessarily configured ASPM when called from a .resume() method (ASPM configuration needs to be restored during resume, but pci_restore_pcie_state() should already do this). Move ASPM configuration from pci_set_power_state() to do_pci_enable_device() so we do it when a driver enables a device. [bhelgaas: changelog] Link: https://bugzilla.kernel.org/show_bug.cgi?id=79621 Fixes: db288c9c5f9d ("PCI / PM: restore the original behavior of pci_set_power_state()") Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Vidya Sagar <sagar.tv@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.6+
2014-07-15PCI: generic: Fix GPL v2 license string typoBjorn Helgaas
Per license_is_gpl_compatible(), the MODULE_LICENSE() string for GPL v2 is "GPL v2", not "GPLv2". Use "GPL v2" so this module doesn't taint the kernel. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Will Deacon <will.deacon@arm.com>
2014-07-15PCI: rcar: Fix GPL v2 license string typoBjorn Helgaas
Per license_is_gpl_compatible(), the MODULE_LICENSE() string for GPL v2 is "GPL v2", not "GPLv2". Use "GPL v2" so this module doesn't taint the kernel. Based-on-work-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-15PCI: tegra: Fix GPL v2 license string typoThierry Reding
Per license_is_gpl_compatible(), the MODULE_LICENSE() string for GPL v2 is "GPL v2", not "GPLv2". Use "GPL v2" so this module doesn't taint the kernel. [bhelgaas: changelog] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jg1.han@samsung.com>
2014-07-15PCI: mvebu: Fix GPL v2 license string typoThierry Reding
Per license_is_gpl_compatible(), the MODULE_LICENSE() string for GPL v2 is "GPL v2", not "GPLv2". Use "GPL v2" so this module doesn't taint the kernel. [bhelgaas: changelog] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-07-08Merge branches 'pci/host-rcar', 'pci/hotplug', 'pci/iommu', 'pci/misc' and ↵Bjorn Helgaas
'pci/msi' into next * pci/host-rcar: PCI: rcar: Remove rcar_pcie_setup_window() resource argument PCI: rcar: Cleanup style and formatting PCI: rcar: Use correct initial HW settings PCI: rcar: Remove redundant config accessor register number checks * pci/hotplug: PCI: cpqphp: Remove unnecessary null test before debugfs_remove() PCI: pciehp: Clear Data Link Layer State Changed during init PCI: pciehp: Remove struct controller.no_cmd_complete PCI: pciehp: Remove assumptions about which commands cause completion events PCI: pciehp: Compute timeout from hotplug command start time PCI: pciehp: Wait for hotplug command completion lazily PCI: pciehp: Make pcie_wait_cmd() self-contained PCI: Prevent NULL dereference during pciehp probe * pci/iommu: PCI: Add bridge DMA alias quirk for Intel 82801 bridge * pci/misc: ACPI / PCI: Fix sysfs acpi_index and label errors PCI/portdrv: Remove warning about invalid IRQ for hot-added PCIe ports * pci/msi: PCI/MSI: Cache Multiple Message Capable in struct msi_desc PCI/MSI: Remove unused msi_enabled_mask() PCI/MSI: Add internal msix_clear_and_set_ctrl() function
2014-07-08PCI: Tidy resource assignment messagesBjorn Helgaas
Print messages about failures in pci_assign_resource(). We can drop the "by-hand" message from _pci_assign_resource() because %pR now prints the size rather than the address if the resource hasn't been assigned. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-08PCI: Return conventional error values from pci_revert_fw_address()Bjorn Helgaas
Previously we returned zero for success or 1 for failure. This changes that so we return zero for success or a negative errno for failure. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-08PCI: Cleanup control flowBjorn Helgaas
Return errors immediately so the straightline path is the normal, no-error path. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-08PCI: Support BAR sizes up to 128GBYinghai Lu
Increase the maximum BAR size from 8GB to 128GB. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-07PCI: cpqphp: Remove unnecessary null test before debugfs_remove()Fabian Frederick
Fix checkpatch warning: "WARNING: debugfs_remove(NULL) is safe this check is probably not required" Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Ryan Desfosses <ryan@desfo.org>
2014-07-07PCI: pciehp: Clear Data Link Layer State Changed during initMyron Stowe
During PCIe hot-plug initialization - pciehp_probe() - data structures related to slot capabilities are set up. As part of this set up, ISRs are put in place to handle slot events and all event bits are cleared out. This patch adds the Data Link Layer State Changed (PCI_EXP_SLTSTA_DLLSC) Slot Status bit to the event bits that are cleared out during initialization. If the BIOS doesn't clear DLLSC before handoff to the OS, pciehp notices that it's set and interprets it as a new Link Up event, which results in spurious messages: pciehp 0000:82:04.0:pcie24: slot(4): Link Up event pciehp 0000:82:04.0:pcie24: Device 0000:83:00.0 already exists at 0000:83:00, cannot hot-add pciehp 0000:82:04.0:pcie24: Cannot add device at 0000:83:00 Prior to e48f1b67f668 ("PCI: pciehp: Use link change notifications for hot-plug and removal"), pciehp ignored DLLSC. Reference: PCI-SIG. PCI Express Base Specification Revision 4.0 Version 0.3 (PCI-SIG, 2014): 7.8.11. Slot Status Register (Offset 1Ah). [bhelgaas: add e48f1b67f668 ref and stable tag] Fixes: e48f1b67f668 ("PCI: pciehp: Use link change notifications for hot-plug and removal") Link: https://bugzilla.kernel.org/show_bug.cgi?id=79611 Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.15+
2014-07-05PCI: Add bridge DMA alias quirk for Intel 82801 bridgeAlex Williamson
This bridge sometimes shows up as a root complex device and sometimes as a discrete PCIe-to-PCI bridge. Testing indicates that in the latter case, we need to enable the PCIe bridge DMA alias quirk. Reported-by: Milos Kaurin <milos.kaurin@gmail.com> Tested-by: Milos Kaurin <milos.kaurin@gmail.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-05PCI: rcar: Remove rcar_pcie_setup_window() resource argumentPhil Edworthy
rcar_pcie_setup_window() took both the window number and the resource, which was redundant because we can look up the resource from the window number. Remove the "res" argument. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-05PCI: rcar: Cleanup style and formattingPhil Edworthy
This patch just makes symbol and function name changes to avoid potential conflicts, along with minor formatting changes. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-05PCI: rcar: Use correct initial HW settingsPhil Edworthy
Although the R-Car PCIe driver works as it is, there are a number of incorrect settings that this patch corrects. It corrects: - enabling the PCI Express Extended Cap ID. - setting Data Link Layer Link Active Reporting Capable. - terminating list of capabilities. It also removes enabling the MAC data scrambling as this is the default HW setting, and removes incorrect code to enable slave bus mastering as this is done by the PCI core. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-05PCI: rcar: Remove redundant config accessor register number checksSergei Shtylyov
The PCI core will have already checked the configuration register address before calling the {read|write}() methods; so don't check it again in these methods. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-05PCI: pciehp: Remove struct controller.no_cmd_completeRajat Jain
"no_cmd_complete" is only used once, and it duplicates read-only information we already have in the cached Slot Capabilities value. Remove the field and use the existing macro NO_CMD_CMPL() instead. [bhelgaas: changelog] Signed-off-by: Rajat Jain <rajatxjain@gmail.com> Signed-off-by: Rajat Jain <rajatjain@juniper.net> Signed-off-by: Guenter Roeck <groeck@juniper.net> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-03PCI: Keep original resource if we fail to expand itGuo Chao
If we have space assigned to a resource, we try to expand the resource (e.g., to accommodate SR-IOV resources), and the expansion attempt fails, we should keep the original assignment. After bd064f0a231a ("PCI: Mark resources as IORESOURCE_UNSET if we can't assign them"), we left the resource marked IORESOURCE_UNSET when the expansion failed, even if it had originally been set. That caused errors like this: pci 0003:00:00.0: can't enable device: BAR 15 [mem size 0x0c000000 64bit pref] not assigned pci 0003:00:00.0: Error enabling bridge (-22), continuing Fix this by restoring the original flags when reassignment fails. [bhelgaas: reworked to simplify, changelog] Fixes: bd064f0a231a ("PCI: Mark resources as IORESOURCE_UNSET if we can't assign them") Signed-off-by: Guo Chao <yan@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.15+
2014-07-03PCI/MSI: Cache Multiple Message Capable in struct msi_descYijing Wang
The Multiple Message Capable field in the MSI Message Control register indicates how many vectors the device supports. This field is read-only, so cache it in msi_desc to avoid reading it repeatedly. Since we cache the extracted field (not the entire Message Control register), we can use msi_mask() instead of msi_capable_mask(), which is then unused, so remove it. [bhelgaas: fix whitespace, changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-03PCI/MSI: Remove unused msi_enabled_mask()Yijing Wang
No one uses msi_enabled_mask(); remove the dead code. No functional change. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-03PCI/MSI: Add internal msix_clear_and_set_ctrl() functionYijing Wang
Add msix_clear_and_set_ctrl() simplify code. No functional change. [bhelgaas: fix whitespace] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-03PCI: Make resetting secondary bus logic commonGavin Shan
Commit d92a208d086 ("powerpc/pci: Mask linkDown on resetting PCI bus") implemented same logic (resetting PCI secondary bus by bridge's config register PCI_BRIDGE_CTL_BUS_RESET) in PCI core and arch-dependent code. To avoid the duplication, move the logic to pci_reset_secondary_bus(). That commit did not declare the pcibios_reset_secondary_bus() interface in linux/include/pci.h. Add the declaration. No functional change. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-07-02ACPI / PCI: Fix sysfs acpi_index and label errorsSimone Gotti
Fix errors in handling "device label" _DSM return values. If _DSM returns a Unicode string, the ACPI type is ACPI_TYPE_BUFFER, not ACPI_TYPE_STRING. Fix dsm_label_utf16s_to_utf8s() to convert UTF-16 from acpi_object->buffer instead of acpi_object->string. Prior to v3.14, we accepted Unicode labels (ACPI_TYPE_BUFFER return values). But after 1d0fcef73283, we accepted only ASCII (ACPI_TYPE_STRING) (and we incorrectly tried to convert those ASCII labels from UTF-16 to UTF-8). Rejecting Unicode labels made us return -EPERM when reading sysfs "acpi_index" or "label" files, which in turn caused on-board network interfaces on a Dell PowerEdge E420 to be renamed (by udev net_id internal) from eno1/eno2 to enp2s0f0/enp2s0f1. Fix this by accepting either ACPI_TYPE_STRING (and treating it as ASCII) or ACPI_TYPE_BUFFER (and converting from UTF-16 to UTF-8). [bhelgaas: changelog] Fixes: 1d0fcef73283 ("ACPI / PCI: replace open-coded _DSM code with helper functions") Signed-off-by: Simone Gotti <simone.gotti@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com> CC: stable@vger.kernel.org # v3.14+
2014-07-02PCI/portdrv: Remove warning about invalid IRQ for hot-added PCIe portsJiang Liu
For hot-added PCIe ports on x86 platforms, we always warned about an invalid IRQ, e.g., pci 0000:00:00.0: device [8086:0e0b] has invalid IRQ; check vendor BIOS This was because we check pci_dev->irq before actually allocating the IRQ for the device, which happens in this path: pcie_port_device_register pci_enable_device pci_enable_device_flags do_pci_enable_device pcibios_enable_device (on x86) pcibios_enable_irq This warning message isn't generated for PCIe ports present at boot time because x86 arch code has called acpi_pci_irq_enable() in pci_acpi_init() for each PCI device for safety. [bhelgaas: changelog] Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-06-23trace, AER: Move trace into unified interfaceChen, Gong
AER uses a separate trace interface by now. To make it consistent, move it into unified RAS trace interface. Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
2014-06-17PCI: Fix unaligned access in AF transaction pending testAlex Williamson
pci_wait_for_pending() uses word access, so we shouldn't be passing an offset that is only byte aligned. Use the control register offset instead, shifting the mask to match. Fixes: d0b4cc4e3270 ("PCI: Wrong register used to check pending traffic") Fixes: 157e876ffe0b ("PCI: Add pci_wait_for_pending() (refactor pci_wait_for_pending_transaction()) Reported-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> CC: stable@vger.kernel.org # v3.14+
2014-06-17PCI: pciehp: Remove assumptions about which commands cause completion eventsBjorn Helgaas
We use incorrect logic to decide whether a PCIe hotplug controller generates command completion events. 5808639bfa98 ("pciehp: fix slow probing") assumed that the Slot Status "Command Completed" bit was set only for commands affecting slot power, indicators, or electromechanical interlock. That assumption is false: per sec. 6.7.3.2 of PCIe spec r3.0, a write targeting any portion of the Slot Control register is a command, and (if command completed events are supported) software must wait for a command to complete before issuing the next command. 5808639bfa98 was to fix boot-time timeouts (see bugzilla below) on a Lenovo Thinkpad R61 with an Intel hotplug controller. The controller probably has the Intel CF118 erratum, which means it doesn't report Command Completed unless the Slot Control power, indicator, or interlock bits are changed. This causes a timeout because pciehp always waits for Command Complete (if supported), regardless of which bits are changed. Remove the incorrect logic because the timeouts have been addressed differently by these changes: PCI: pciehp: Wait for hotplug command completion lazily PCI: pciehp: Compute timeout from hotplug command start time Link: https://bugzilla.kernel.org/show_bug.cgi?id=10751 Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2014-06-17PCI: pciehp: Compute timeout from hotplug command start timeBjorn Helgaas
If we issue a hotplug command, go do something else, then come back and wait for the command to complete, we don't have to wait the whole timeout period, because some of it elapsed while we were doing something else. Keep track of the time we issued the command, and wait only until the timeout period from that point has elapsed. For controllers with errata like Intel CF118, we previously timed out before issuing the second hotplug command: At time T1 (during boot): - Write DLLSCE, ABPE, PDCE, etc. to Slot Control At time T2 (hotplug event): - Wait for command completion (CC) in Slot Status - Timeout at T2 + 1 second because CC is never set in Slot Status - Write PCC, PIC, etc. to Slot Control With this change, we wait until T1 + 1 second instead of T2 + 1 second. If the hotplug event is more than 1 second after the boot-time initialization, we won't wait for the timeout at all. We still emit a "Timeout on hotplug command" message if it timed out; we should see this on the first hotplug event on every controller with this erratum, as well as on real errors on controllers without the erratum. Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2014-06-17PCI: pciehp: Wait for hotplug command completion lazilyBjorn Helgaas
Previously we issued a hotplug command and waited for it to complete. But there's no need to wait until we're ready to issue the *next* command. The next command will probably be much later, so the first one may have already completed and we may not have to actually wait at all. Because of hardware errata, some controllers generate command completion events for some commands but not others. In the case of Intel CF118 (see spec update reference), the controller indicates command completion only for Slot Control writes that change the value of the following bits: Power Controller Control Power Indicator Control Attention Indicator Control Electromechanical Interlock Control Changes to other bits, e.g., the interrupt enable bits, do not cause the Command Completed bit to be set. Controllers from AMD and Nvidia are reported to have similar errata. These errata cause timeouts when pcie_enable_notification() enables interrupts. Previously that timeout occurred at boot-time. With this change, the timeout occurs later, when we change the state of the slot power, indicators, or interlock. This speeds up boot but causes a timeout at the first hotplug event on the slot. Subsequent events don't timeout because only the first (boot-time) hotplug command updates Slot Control without touching the power/indicator/interlock controls. Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2014-06-16PCI: pciehp: Make pcie_wait_cmd() self-containedBjorn Helgaas
pcie_wait_cmd() waits for the controller to finish a hotplug command. Move the associated logic (to determine whether waiting is required and whether we're using interrupts or polling) from pcie_write_cmd() to pcie_wait_cmd(). No functional change. Tested-by: Rajat Jain <rajatxjain@gmail.com> (IDT 807a controller) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2014-06-16PCI: Prevent NULL dereference during pciehp probeAndreas Noever
pciehp assumes that dev->subordinate exists. But we do not assign a bus if we run out of bus numbers during enumeration. This leads to a NULL dereference in init_slot() (and other places). Change pciehp_probe() to return -ENODEV when no subordinate bus is present. Signed-off-by: Andreas Noever <andreas.noever@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-06-12Merge tag 'pci-v3.16-changes-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull more PCI updates from Bjorn Helgaas: "Here are some more things I'd like to see in v3.16-rc1: - DMA alias iterator, part of some work to fix IOMMU issues - MVEBU, Tegra, DesignWare changes that I forgot to include before - Some whitespace code cleanup Details: IOMMU - Add DMA alias iterator (Alex Williamson) - Add DMA alias quirks for ASMedia, ITE, Tundra bridges (Alex Williamson) - Add DMA alias quirks for Marvell, Ricoh devices (Alex Williamson) - Add DMA alias quirk for HighPoint devices (Jérôme Carretero) MSI - Fix leak in free_msi_irqs() (Alexei Starovoitov) Marvell MVEBU - Remove unnecessary use of 'conf_lock' spinlock (Andrew Murray) - Avoid setting an undefined window size (Jason Gunthorpe) - Allow several windows with the same target/attribute (Thomas Petazzoni) - Split PCIe BARs into multiple MBus windows when needed (Thomas Petazzoni) - Fix off-by-one in the computed size of the mbus windows (Willy Tarreau) NVIDIA Tegra - Use new OF interrupt mapping when possible (Lucas Stach) Synopsys DesignWare - Remove unnecessary use of 'conf_lock' spinlock (Andrew Murray) - Use new OF interrupt mapping when possible (Lucas Stach) - Split Exynos and i.MX bindings (Lucas Stach) - Fix comment for setting number of lanes (Mohit Kumar) - Fix iATU programming for cfg1, io and mem viewport (Mohit Kumar) Miscellaneous - EXPORT_SYMBOL cleanup (Ryan Desfosses) - Whitespace cleanup (Ryan Desfosses) - Merge multi-line quoted strings (Ryan Desfosses)" * tag 'pci-v3.16-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (21 commits) PCI: Add function 1 DMA alias quirk for HighPoint RocketRaid 642L PCI/MSI: Fix memory leak in free_msi_irqs() PCI: Merge multi-line quoted strings PCI: Whitespace cleanup PCI: Move EXPORT_SYMBOL so it immediately follows function/variable PCI: Add bridge DMA alias quirk for ITE bridge PCI: designware: Split Exynos and i.MX bindings PCI: Add bridge DMA alias quirk for ASMedia and Tundra bridges PCI: Add support for PCIe-to-PCI bridge DMA alias quirks PCI: Add function 1 DMA alias quirk for Marvell devices PCI: Add function 0 DMA alias quirk for Ricoh devices PCI: Add support for DMA alias quirks PCI: Convert pci_dev_flags definitions to bit shifts PCI: Add DMA alias iterator PCI: mvebu: Use '%pa' for printing 'phys_addr_t' type PCI: mvebu: Remove unnecessary use of 'conf_lock' spinlock PCI: designware: Remove unnecessary use of 'conf_lock' spinlock PCI: designware: Use new OF interrupt mapping when possible PCI: designware: Fix iATU programming for cfg1, io and mem viewport PCI: designware: Fix comment for setting number of lanes ...
2014-06-12Merge tag 'pm+acpi-3.16-rc1-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull more ACPI and power management updates from Rafael Wysocki: "These are fixups on top of the previous PM+ACPI pull request, regression fixes (ACPI hotplug, cpufreq ppc-corenet), other bug fixes (ACPI reset, cpufreq), new PM trace points for system suspend profiling and a copyright notice update. Specifics: - I didn't remember correctly that the Hans de Goede's ACPI video patches actually didn't flip the video.use_native_backlight default, although we had discussed that and decided to do that. Since I said we would do that in the previous PM+ACPI pull request, make that change for real now. - ACPI bus check notifications for PCI host bridges don't cause the bus below the host bridge to be checked for changes as they should because of a mistake in the ACPI-based PCI hotplug (ACPIPHP) subsystem that forgets to add hotplug contexts to PCI host bridge ACPI device objects. Create hotplug contexts for PCI host bridges too as appropriate. - Revert recent cpufreq commit related to the big.LITTLE cpufreq driver that breaks arm64 builds. - Fix for a regression in the ppc-corenet cpufreq driver introduced during the 3.15 cycle and causing the driver to use the remainder from do_div instead of the quotient. From Ed Swarthout. - Resets triggered by panic activate a BUG_ON() in vmalloc.c on systems where the ACPI reset register is located in memory address space. Fix from Randy Wright. - Fix for a problem with cpufreq governors that decisions made by them may be suboptimal due to the fact that deferrable timers are used by them for CPU load sampling. From Srivatsa S Bhat. - Fix for a problem with the Tegra cpufreq driver where the CPU frequency is temporarily switched to a "stable" level that is different from both the initial and target frequencies during transitions which causes udelay() to expire earlier than it should sometimes. From Viresh Kumar. - New trace points and rework of some existing trace points for system suspend/resume profiling from Todd Brandt. - Assorted cpufreq fixes and cleanups from Stratos Karafotis and Viresh Kumar. - Copyright notice update for suspend-and-cpuhotplug.txt from Srivatsa S Bhat" * tag 'pm+acpi-3.16-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ACPI / hotplug / PCI: Add hotplug contexts to PCI host bridges PM / sleep: trace events for device PM callbacks cpufreq: cpufreq-cpu0: remove dependency on THERMAL and REGULATOR cpufreq: tegra: update comment for clarity cpufreq: intel_pstate: Remove duplicate CPU ID check cpufreq: Mark CPU0 driver with CPUFREQ_NEED_INITIAL_FREQ_CHECK flag PM / Documentation: Update copyright in suspend-and-cpuhotplug.txt cpufreq: governor: remove copy_prev_load from 'struct cpu_dbs_common_info' cpufreq: governor: Be friendly towards latency-sensitive bursty workloads PM / sleep: trace events for suspend/resume cpufreq: ppc-corenet-cpu-freq: do_div use quotient Revert "cpufreq: Enable big.LITTLE cpufreq driver on arm64" cpufreq: Tegra: implement intermediate frequency callbacks cpufreq: add support for intermediate (stable) frequencies ACPI / video: Change the default for video.use_native_backlight to 1 ACPI: Fix bug when ACPI reset register is implemented in system memory
2014-06-11Merge branches 'pci/msi', 'pci/iommu' and 'pci/cleanup' into nextBjorn Helgaas
* pci/msi: PCI/MSI: Fix memory leak in free_msi_irqs() * pci/iommu: PCI: Add function 1 DMA alias quirk for HighPoint RocketRaid 642L PCI: Add bridge DMA alias quirk for ITE bridge * pci/cleanup: PCI: Merge multi-line quoted strings PCI: Whitespace cleanup PCI: Move EXPORT_SYMBOL so it immediately follows function/variable
2014-06-11PCI: Add function 1 DMA alias quirk for HighPoint RocketRaid 642LJérôme Carretero
This device uses function 1 as the PCIe requester ID. This vendor has similar boards based on the same Marvell 88SE9235 chipset, but this patch was only tested with the 642L. Tested on ASUS Sabertooth 990FX (AMD). Link: https://bugzilla.kernel.org/show_bug.cgi?id=42679 Signed-off-by: Jérôme Carretero <cJ-ko@zougloub.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alex Williamson <alex.williamson@redhat.com>
2014-06-11ACPI / hotplug / PCI: Add hotplug contexts to PCI host bridgesRafael J. Wysocki
After relatively recent changes in the ACPI-based PCI hotplug (ACPIPHP) code, the acpiphp_check_host_bridge() executed for PCI host bridges via acpi_pci_root_scan_dependent() doesn't do anything useful, because those bridges do not have hotplug contexts. That happens by mistake, so fix it by making acpiphp_enumerate_slots() add hotplug contexts to PCI host bridges too and modify acpiphp_remove_slots() to drop those contexts for host bridges as appropriate. Link: https://bugzilla.kernel.org/show_bug.cgi?id=76901 Fixes: 2d8b1d566a5f (ACPI / hotplug / PCI: Get rid of check_sub_bridges()) Reported-and-tested-by: Gavin Guo <gavin.guo@canonical.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: 3.15+ <stable@vger.kernel.org> # 3.15+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-06-11PCI/MSI: Fix memory leak in free_msi_irqs()Alexei Starovoitov
free_msi_irqs() is leaking memory, since list_for_each_entry(entry, &dev->msi_list, list) {...} is never executed, because dev->msi_list is made empty by the loop just above this one. Fix it by relying on zero termination of attribute array like populate_msi_sysfs() does. Fixes: 1c51b50c2995 ("PCI/MSI: Export MSI mode using attributes, not kobjects") Signed-off-by: Alexei Starovoitov <ast@plumgrid.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: stable@vger.kernel.org # v3.14+
2014-06-10PCI: Merge multi-line quoted stringsRyan Desfosses
Merge quoted strings that are broken across lines into a single entity. The compiler merges them anyway, but checkpatch complains about it, and merging them makes it easier to grep for strings. No functional change. [bhelgaas: changelog, do the same for everything under drivers/pci] Signed-off-by: Ryan Desfosses <ryan@desfo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-06-10PCI: Whitespace cleanupRyan Desfosses
Fix various whitespace errors. No functional change. [bhelgaas: fix other similar problems] Signed-off-by: Ryan Desfosses <ryan@desfo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-06-10Merge branch 'next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Ben Herrenschmidt: "Here is the bulk of the powerpc changes for this merge window. It got a bit delayed in part because I wasn't paying attention, and in part because I discovered I had a core PCI change without a PCI maintainer ack in it. Bjorn eventually agreed it was ok to merge it though we'll probably improve it later and I didn't want to rebase to add his ack. There is going to be a bit more next week, essentially fixes that I still want to sort through and test. The biggest item this time is the support to build the ppc64 LE kernel with our new v2 ABI. We previously supported v2 userspace but the kernel itself was a tougher nut to crack. This is now sorted mostly thanks to Anton and Rusty. We also have a fairly big series from Cedric that add support for 64-bit LE zImage boot wrapper. This was made harder by the fact that traditionally our zImage wrapper was always 32-bit, but our new LE toolchains don't really support 32-bit anymore (it's somewhat there but not really "supported") so we didn't want to rely on it. This meant more churn that just endian fixes. This brings some more LE bits as well, such as the ability to run in LE mode without a hypervisor (ie. under OPAL firmware) by doing the right OPAL call to reinitialize the CPU to take HV interrupts in the right mode and the usual pile of endian fixes. There's another series from Gavin adding EEH improvements (one day we *will* have a release with less than 20 EEH patches, I promise!). Another highlight is the support for the "Split core" functionality on P8 by Michael. This allows a P8 core to be split into "sub cores" of 4 threads which allows the subcores to run different guests under KVM (the HW still doesn't support a partition per thread). And then the usual misc bits and fixes ..." [ Further delayed by gmail deciding that BenH is a dirty spammer. Google knows. ] * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (155 commits) powerpc/powernv: Add missing include to LPC code selftests/powerpc: Test the THP bug we fixed in the previous commit powerpc/mm: Check paca psize is up to date for huge mappings powerpc/powernv: Pass buffer size to OPAL validate flash call powerpc/pseries: hcall functions are exported to modules, need _GLOBAL_TOC() powerpc: Exported functions __clear_user and copy_page use r2 so need _GLOBAL_TOC() powerpc/powernv: Set memory_block_size_bytes to 256MB powerpc: Allow ppc_md platform hook to override memory_block_size_bytes powerpc/powernv: Fix endian issues in memory error handling code powerpc/eeh: Skip eeh sysfs when eeh is disabled powerpc: 64bit sendfile is capped at 2GB powerpc/powernv: Provide debugfs access to the LPC bus via OPAL powerpc/serial: Use saner flags when creating legacy ports powerpc: Add cpu family documentation powerpc/xmon: Fix up xmon format strings powerpc/powernv: Add calls to support little endian host powerpc: Document sysfs DSCR interface powerpc: Fix regression of per-CPU DSCR setting powerpc: Split __SYSFS_SPRSETUP macro arch: powerpc/fadump: Cleaning up inconsistent NULL checks ...
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