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2017-03-15pwm: pca9685: Fix period change with same duty cycleClemens Gruber
commit 8d254a340efb12b40c4c1ff25a48a4f48f7bbd6b upstream. When first implementing support for changing the output frequency, an optimization was added to continue the PWM after changing the prescaler without having to reprogram the ON and OFF registers for the duty cycle, in case the duty cycle stayed the same. This was flawed, because we compared the absolute value of the duty cycle in nanoseconds instead of the ratio to the period. Fix the problem by removing the shortcut. Fixes: 01ec8472009c9 ("pwm-pca9685: Support changing the output frequency") Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-12-08pwm: Fix device reference leakJohan Hovold
commit 0e1614ac84f1719d87bed577963bb8140d0c9ce8 upstream. Make sure to drop the reference to the parent device taken by class_find_device() after "unexporting" any children when deregistering a PWM chip. Fixes: 0733424c9ba9 ("pwm: Unexport children before chip removal") Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-10pwm: Unexport children before chip removalDavid Hsu
commit 0733424c9ba9f42242409d1ece780777272f7ea1 upstream. Exported pwm channels aren't removed before the pwmchip and are leaked. This results in invalid sysfs files. This fix removes all exported pwm channels before chip removal. Signed-off-by: David Hsu <davidhsu@google.com> Fixes: 76abbdde2d95 ("pwm: Add sysfs interface") Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-30pwm: Mark all devices as "might sleep"Thierry Reding
commit ff01c944cfa939f3474c28d88223213494aedf0b upstream. Commit d1cd21427747 ("pwm: Set enable state properly on failed call to enable") introduced a mutex that is needed to protect internal state of PWM devices. Since that mutex is acquired in pwm_set_polarity() and in pwm_enable() and might potentially block, all PWM devices effectively become "might sleep". It's rather pointless to keep the .can_sleep field around, but given that there are external users let's postpone the removal for the next release cycle. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Fixes: d1cd21427747 ("pwm: Set enable state properly on failed call to enable") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2016-09-15pwm: lpc32xx: fix and simplify duty cycle and period calculationsVladimir Zapolskiy
[ Upstream commit 5a9fc9c666d5d759699cf5495bda85f1da0d747e ] The change fixes a problem, if duty_ns is too small in comparison to period_ns (as a valid corner case duty_ns is 0 ns), then due to PWM_DUTY() macro applied on a value the result is overflowed over 8 bits, and instead of the highest bitfield duty cycle value 0xff the invalid duty cycle bitfield value 0x00 is written. For reference the LPC32xx spec defines PWMx_DUTY bitfield description is this way and it seems to be correct: [Low]/[High] = [PWM_DUTY]/[256-PWM_DUTY], where 0 < PWM_DUTY <= 255. In addition according to my oscilloscope measurements LPC32xx PWM is "tristate" in sense that it produces a wave with floating min/max voltage levels for different duty cycle values, for corner cases: PWM_DUTY == 0x01 => signal is in range from -1.05v to 0v .... PWM_DUTY == 0x80 => signal is in range from -0.75v to +0.75v .... PWM_DUTY == 0xff => signal is in range from 0v to +1.05v PWM_DUTY == 0x00 => signal is around 0v, PWM is off Due to this peculiarity on very long period ranges (less than 1KHz) and odd pre-divider values PWM generated wave does not remind a clock shape signal, but rather a heartbit shape signal with positive and negative peaks, so I would recommend to use high-speed HCLK clock as a PWM parent clock and avoid using RTC clock as a parent. The change corrects PWM output in corner cases and prevents any possible overflows in calculation of values for PWM_DUTY and PWM_RELOADV bitfields, thus helper macro definitions may be removed. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-15pwm: lpc32xx: correct number of PWM channels from 2 to 1Vladimir Zapolskiy
[ Upstream commit ebe1fca35038df28b5c183e8486863e765364ec1 ] LPC32xx SoC has two independent PWM controllers, they have different clock parents, clock gates and even slightly different controls, and each of these two PWM controllers has one output channel. Due to almost similar controls arranged in a row it is incorrectly set that there is one PWM controller with two channels, fix this problem, which at the moment prevents separate configuration of different clock parents and gates for both PWM controllers. The change makes previous PWM device node description incompatible with this update. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-15pwm: fsl-ftm: Fix clock enable/disable when using PMStefan Agner
[ Upstream commit 816aec2325e620b6454474372a21f90a8740cb28 ] A FTM PWM instance enables/disables three clocks: The bus clock, the counter clock and the PWM clock. The bus clock gets enabled on pwm_request, whereas the counter and PWM clocks will be enabled upon pwm_enable. The driver has three closesly related issues when enabling/disabling clocks during suspend/resume: - The three clocks are not treated differently in regards to the individual PWM state enabled/requested. This can lead to clocks getting disabled which have not been enabled in the first place (a PWM channel which only has been requested going through suspend/resume). - When entering suspend, the current behavior relies on the FTM_OUTMASK register: If a PWM output is unmasked, the driver assumes the clocks are enabled. However, some PWM instances have only 2 channels connected (e.g. Vybrid's FTM1). In that case, the FTM_OUTMASK reads 0x3 if all channels are disabled, even if the code wrote 0xff to it before. For those PWM instances, the current approach to detect enabled PWM signals does not work. - A third issue applies to the bus clock only, which can get enabled multiple times (once for each PWM channel of a PWM chip). This is fine, however when entering suspend mode, the clock only gets disabled once. This change introduces a different approach by relying on the enable and prepared counters of the clock framework and using the frameworks PWM signal states to address all three issues. Clocks get disabled during suspend and back enabled on resume regarding to the PWM channels individual state (requested/enabled). Since we do not count the clock enables in the driver, this change no longer clears the Status and Control registers Clock Source Selection (FTM_SC[CLKS]). However, since we disable the selected clock anyway, and we explicitly select the clock source on reenabling a PWM channel this approach should not make a difference in practice. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-04pwm: brcmstb: Fix check of devm_ioremap_resource() return codeVladimir Zapolskiy
commit c5857e3f94ab2719dfac649a146cb5dd6f21fcf3 upstream. The change fixes potential oops while accessing iomem on invalid address if devm_ioremap_resource() fails due to some reason. The devm_ioremap_resource() function returns ERR_PTR() and never returns NULL, which makes useless a following check for NULL. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Fixes: 3a9f5957020f ("pwm: Add Broadcom BCM7038 PWM controller support") Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-11Merge tag 'pwm/for-4.4-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This round contains a couple of new drivers for the Marvell Berlin family of SoCs, various SoCs from Renesas and Broadcom as well as the backlight PWM present on MediaTek SoCs. Further existing drivers are extended to support a wider range of hardware. The remaining patches are minor fixes and cleanups across the board. Note that one of the patches included in this pull request is against arch/unicore32. I've included it here because I couldn't get a response from Guan Xuetao and I consider the change low-risk. Equivalent patches have been merged and tested in Samsung and PXA trees. The goal is to finally get rid of legacy code paths that have repeatedly been causing headaches" * tag 'pwm/for-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (24 commits) pwm: sunxi: Fix whitespace issue pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro's pwm: sysfs: Remove unnecessary temporary variable unicore32: nb0916: Use PWM lookup table pwm: pwm-rcar: Revise the device tree binding document about compatible pwm: Return -ENODEV if no PWM lookup match is found pwm: sun4i: Add support for PWM controller on sun5i SoCs pwm: Set enable state properly on failed call to enable pwm: lpss: Add support for runtime PM pwm: lpss: Add more Intel Broxton IDs pwm: lpss: Support all four PWMs on Intel Broxton pwm: lpss: Add support for multiple PWMs pwm-pca9685: enable ACPI device found on Galileo Gen2 pwm: Add MediaTek display PWM driver support dt-bindings: pwm: Add MediaTek display PWM bindings pwm: tipwmss: Enable on TI DRA7x and AM437x pwm: atmel-hlcdc: add sama5d2 SoC support. pwm: Add Broadcom BCM7038 PWM controller support Documentation: dt: add Broadcom BCM7038 PWM controller binding pwm: Add support for R-Car PWM Timer ...
2015-11-10pwm: sunxi: Fix whitespace issueOlliver Schinagl
This patch changes no code, it just fixes the whitespacing. Operators should be separated from operands by a single space. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10pwm: sysfs: Make use of the DEVICE_ATTR_[RW][WO] macro'sOlliver Schinagl
For the npwm property the PWM sysfs interface already made use of the DEVICE_ATTR_RO macro. This patch expands this to the other sysfs properties so that the code base is concise and makes use of this helpful macro. This has the advantage of slightly reducing the code size, improving readability and no longer using magic values for permissions. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10pwm: sysfs: Remove unnecessary temporary variableOlliver Schinagl
Use the result of pwm_is_enabled() directly instead of storing it in a temporary variable. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10pwm: Return -ENODEV if no PWM lookup match is foundThierry Reding
When looking up a PWM using the lookup table, assume that all entries will have been added already, so failure to find a match means that no corresponding entry has been registered. This fixes an issue where -EPROBE_DEFER would be returned if the PWM lookup table is empty. After this fix, -EPROBE_DEFER is reserved for situations where no provider has yet registered for a matching entry. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10pwm: sun4i: Add support for PWM controller on sun5i SoCsHans de Goede
The PWM controller on sun5i SoCs is identical to the one found on sun7i SoCs. On the A13 package only one of the 2 pins is routed to the outside, so only advertise one PWM channel there. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-10pwm: Set enable state properly on failed call to enableJonathan Richardson
The pwm_enable() function didn't clear the enabled bit if a call to the driver's ->enable() callback returned an error. The result was that the state of the PWM core was wrong. Clearing the bit when enable returns an error ensures the state is properly set. Tested-by: Jonathan Richardson <jonathar@broadcom.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Jonathan Richardson <jonathar@broadcom.com> [thierry.reding@gmail.com: add missing kerneldoc for the lock] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm: lpss: Add support for runtime PMQipeng Zha
To be able to save some power when PWM is not in use, add support for runtime PM for this driver. This also allows the platform to transition to low power S0ix states when the system is idle. Signed-off-by: Huiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm: lpss: Add more Intel Broxton IDsMika Westerberg
Add more Intel Broxton ACPI and PCI IDs to the driver supported devices list. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm: lpss: Support all four PWMs on Intel BroxtonMika Westerberg
Intel Broxton has similar PWM than Intel Braswell but instead of one it has four PWMs included in one PCI/ACPI device. This patch adds support for all the four PWMs and changes the PCI part of the driver to use 'pwm_lpss_bxt_info' instead. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm: lpss: Add support for multiple PWMsMika Westerberg
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-11-06pwm-pca9685: enable ACPI device found on Galileo Gen2Andy Shevchenko
There is a chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via ACPI ID INT3492. Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: Add MediaTek display PWM driver supportYH Huang
Add display PWM driver support to modify backlight for MT8173 and MT6595. The PWM has one channel to control the brightness of the display. When the (high_width / period) is closer to 1, the screen is brighter; otherwise, it is darker. Signed-off-by: YH Huang <yh.huang@mediatek.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: tipwmss: Enable on TI DRA7x and AM437xVignesh R
TIPWMSS is present on TI's DRA7x and AM437x SoCs. Enable its usage. Instead of adding each SoC individually, use the more generic symbol ARCH_OMAP2PLUS instead. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: atmel-hlcdc: add sama5d2 SoC support.Nicolas Ferre
Add sama5d2 hlcdc backlight PWM support. This chip doesn't have to deal with an errata, so it's a simple addition of the mfd compatible string. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: Add Broadcom BCM7038 PWM controller supportFlorian Fainelli
Add support for the BCM7038-style PWM controller found in all BCM7xxx STB SoCs. This controller has a hardcoded 2 channels per controller, and cascades a variable frequency generator on top of a fixed frequency generator which offers a range of a 148ns period all the way to ~622ms periods. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06misc: atmel_tclib: get and use slow clockBoris Brezillon
Commit dca1a4b5ff6e ("clk: at91: keep slow clk enabled to prevent system hang") added a workaround for the slow clock as it is not properly handled by its users. Get and use the slow clock as it is necessary for the timer counters. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: Add support for R-Car PWM TimerYoshihiro Shimoda
This patch adds support for R-Car SoCs PWM Timer. The PWM timer of R-Car H2 has 7 channels. So, we can use the channels if we describe device tree nodes. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-10-06pwm: Add support for the Berlin PWM controllerAntoine Ténart
Add a PWM controller driver for the Marvell Berlin SoCs. This PWM controller has 4 channels. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-21pwm: atmel-hlcdc: Fix module autoload for OF platform driverLuis de Bethencourt
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. This patch adds the missing MODULE_DEVICE_TABLE() for OF to export that information so modules have the correct aliases built-in and autoloading works correctly. A longer explanation by Javier Canillas can be found here: https://lkml.org/lkml/2015/7/30/519 Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-09Merge tag 'pwm/for-4.3-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set of changes introduces the beginnings of a new API that's based around the concept of states that can be atomically applied. Drivers go to various lengths to implement something similar, which indicates that the core should really be providing the necessary framework. On top of that, there is a bit of cleanup as well as improved kerneldoc and integration into the device-drivers DocBook. Regarding drivers there is a new one for the NXP LPC18xx family of SoCs and a couple of fixes for existing drivers (pca9685, Broadcom Kona and Atmel HLCDC)" * tag 'pwm/for-4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errata pwm: Add NXP LPC18xx PWM/SCT DT binding documentation pwm: NXP LPC18xx PWM/SCT driver pwm-pca9685: Support changing the output frequency pwm-pca9685: Fix several driver bugs pwm: kona: Modify settings application sequence pwm: pca9685: Drop owner assignment pwm: Add to device-drivers documentation pwm: Clean up kerneldoc pwm: Remove useless whitespace pwm: sysfs: Remove unnecessary padding pwm: sysfs: Properly convert from enum to string pwm: Make use of pwm_get_xxx() helpers where appropriate pwm: Add pwm_get_polarity() helper function pwm: Constify PWM device where possible pwm: Add the pwm_is_enabled() helper
2015-09-09ARM: at91: pwm: atmel-hlcdc: Add at91sam9n12 errataJosh Wu
The errata for HLCDC PWM of at91sam9n12 are the same as for at91sam9x5. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-09-09pwm: NXP LPC18xx PWM/SCT driverAriel D'Alessandro
This commit adds support for NXP LPC18xx PWM/SCT. NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State Configurable Timer (SCT) which can be configured as a Pulse Width Modulator. Other SoCs in that family may share the same hardware. The PWM supports a total of 16 channels, but only 15 can be simultaneously requested. There's only one period, global to all the channels, thus PWM driver will refuse setting different values to it, unless there's only one channel requested. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> [thierry.reding@gmail.com: remove excessive padding of fields] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm-pca9685: Support changing the output frequencyClemens Gruber
Previously, period_ns and duty_ns were only used to determine the ratio of ON and OFF time, the default frequency of 200 Hz was never changed. The PCA9685 however is capable of changing the PWM output frequency, which is expected when changing the period. This patch configures the prescaler accordingly, using the formula and notes provided in the PCA9685 datasheet. Bounds checking for the minimum and maximum frequencies, last updated in revision v.4 of said datasheet, is also added. The prescaler is only touched if the period changed, because we have to put the chip into sleep mode to unlock the prescale register. If it is changed, the PWM output frequency changes for all outputs, because there is one prescaler per chip. This is documented in the PCA9685 datasheet and in the comments. If the duty cycle is not changed at the same time as the period, then we restart the PWM output using the duty cycle to period ratio from before the period change. When using LEDs for example, previously set brightness levels stay the same when the frequency changes. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm-pca9685: Fix several driver bugsClemens Gruber
Problems: - When duty_ns == period_ns, the full OFF bit was not cleared and the PWM output of the PCA9685 stayed off. - When duty_ns == period_ns and the catch-all channel was used, the ALL_LED_OFF_L register was not cleared. - The full ON bit was not cleared when setting the OFF time, therefore the exact OFF time was ignored when setting a duty_ns < period_ns Solution: Clear both OFF registers when setting full ON and clear the full ON bit when changing the OFF registers. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm: kona: Modify settings application sequenceJonathan Richardson
Update the driver so that settings are applied in accordance with the most recent version of the hardware spec. The revised sequence clears the trigger bit, waits 400ns, writes settings, sets the trigger bit, and waits another 400ns. This corrects an issue where occasionally a requested change was not properly reflected in the PWM output. Reviewed-by: Arun Ramamurthy <arunrama@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Tested-by: Scott Branden <sbranden@broadcom.com> Reviewed-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Jonathan Richardson <jonathar@broadcom.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm: pca9685: Drop owner assignmentKrzysztof Kozlowski
i2c_driver does not need to set an owner because i2c_register_driver() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm: Clean up kerneldocThierry Reding
Clean up kerneldoc in preparation for including the PWM documentation in DocBook. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-08-17pwm: Remove useless whitespaceThierry Reding
Remove useless tabs used for padding in structure definitions as well as some blank lines. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-27pwm: sysfs: Remove unnecessary paddingThierry Reding
Padding initializers so that assignment operators align is bound to lead to inconsistencies or churn. Single spaces around the assignment is just fine. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-27pwm: sysfs: Properly convert from enum to stringThierry Reding
The current code will check for polarity in a boolean way. While it is correct that polarity is either normal or inversed, make it more obvious that it's an enumeration by using a switch statement and explicit matches on the enumeration values. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-21pwm: crc: Add Crystalcove (CRC) PWM driverShobhit Kumar
The Crystalcove PMIC provides three PWM signals and this driver exports one of them on the BYT platform which is used to control backlight for DSI panel. This is platform device implementation of the drivers/mfd cell device for CRC PMIC. CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Varka Bhadram <varkabhadram@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-07-20pwm: Make use of pwm_get_xxx() helpers where appropriateBoris Brezillon
Use the pwm_get_xxx() helpers instead of directly accessing the fields in struct pwm_device. This will allow us to smoothly move to the atomic update approach. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-20pwm: Add the pwm_is_enabled() helperBoris Brezillon
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper function to hide the logic behind enabled test. This will allow us to smoothly move from the current approach to an atomic PWM update approach. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-23Merge tag 'pwm/for-4.2-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This has a couple of fixes for Atmel, Samsung and Broadcom drivers. Some preparatory patches for more upcoming Intel work is included as well" * tag 'pwm/for-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: lpss: pci: Add support for Broxton platform pwm: bcm-kona: Don't set polarity in probe pwm: Add pwmchip_add_with_polarity() API pwm: atmel: Fix incorrect CDTY value after disabling pwm: atmel: Fix incorrect CDTY value after enabling pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modalias pwm: Add support to remove registered consumer lookup tables
2015-06-12pwm: lpss: pci: Add support for Broxton platformQipeng Zha
Add PCI device IDs for Broxton platform. Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12pwm: bcm-kona: Don't set polarity in probeArun Ramamurthy
Omit setting the polarity to normal during probe and instead use the new pwmchip_add_with_polarity() function to register a PWM chip with inverse polarity by default for all channels to reflect the hardware default. Signed-off-by: Arun Ramamurthy <arunrama@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Jonathan Richardson <jonathar@broadcom.com> [thierry.reding@gmail.com: use pwmchip_add_with_polarity()] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12pwm: Add pwmchip_add_with_polarity() APITim Kryger
Add a new function to register a PWM chip with channels that have their initial polarity as specified by an additional parameter. This benefits drivers of controllers that by default operate with inversed polarity by removing the need to modify the polarity during initialization. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Jonathan Richardson <jonathar@broadcom.com> [thierry.reding@gmail.com: export pwmchip_add_with_polarity()] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12pwm: atmel: Fix incorrect CDTY value after disablingAlexandre Belloni
pwm-leds calls .config() and .disable() in a row. This exhibits that it may happen that the channel gets disabled before CDTY has been updated with CUPD. The issue gets quite worse with long periods. So, ensure that at least one period has past before disabling the channel by polling ISR. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Gaël PORTAY <gael.portay@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-06-12pwm: atmel: Fix incorrect CDTY value after enablingAlexandre Belloni
CUPD is not flushed before enabling the channel so it will update CDTY/CPRD just after one period. So we always set CUPD, even when the channel is not enabled. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-05-21pwm: samsung: Use MODULE_DEVICE_TABLE() to include OF modaliasJavier Martinez Canillas
If the pwm-samsung driver is built as a module, modalias information is not filled so the module is not autoloaded. Use the MODULE_DEVICE_TABLE() macro to export the OF device ID so the module contains that information. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2015-05-19pwm: img: Impose upper and lower timebase steps valueNaidu Tellapati
The PWM hardware on Pistachio platform has a maximum timebase steps value to 255. To fix it, let's introduce a compatible-specific data structure to contain the SoC-specific details and use it to specify a maximum timebase. Also, let's limit the minimum timebase to 16 steps, to allow a sane range of duty cycle steps. Fixes: 277bb6a29e00 ("pwm: Imagination Technologies PWM DAC driver") Signed-off-by: Naidu Tellapati <naidu.tellapati@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>