Age | Commit message (Collapse) | Author |
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Add new host op for clearing ice configuration.
This config_end host op need to invoked for clearing ice configuration,
once mmc request processing is completed.
Change-Id: Ifc5569ae88748599b75ef5b3e625249ecd667762
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
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Handle the SC event in normal and TTW mode. Check if the
SC event is valid and re-enable the module to check
if it goes away. Disable the module altogether if the
SC event persists.
CRs-Fixed: 1083319
Change-Id: I20bd3ca0bd3cf273a2607656e3f51bde1eaf2dc6
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
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The initialization code in battery.c creates important votables like
FCC, FV which every many other charging drivers are dependent on.
The dependent charging drivers keep probe deferring until the votables
are created.
Ensure that battery.c's initialization code is invoked before other
drivers get added.
Change-Id: I52990baef7f7c4095e635728511e120c1dbe5e9d
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
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In case of USBIN-USBIN based parallel charging configuration
hardware based INOV is disabled and adapter output voltage of
QC3.0 adapter is controlled by userspace daemon. But in case
of QC 2.0 based adapter there is no such daemon to control
adapter output voltage, thus force 9V adapter output when a
QC 2.0 adapter is detected.
While at it, cancel icl_change_work before scheduling it in
order to make sure work is scheduled for next interval.
CRs-Fixed: 2015927
Change-Id: I198f8299b5cd0a62c518815c33088bb5e38c8505
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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PM660 support configurable delay for softstart done with
minimum value of 3msec and thus OTG can be configured to
a minimum value till softstart completes. Add a PM660
specific workaround to set OTG current limit to 250mA before
enabling OTG mode and reconfigure the current back to desired
value once OTG softstart completes.
CRs-Fixed: 2016131
Change-Id: Iabb9e1c55cc59453825795e045d7fcc6caf8f33e
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
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Some FS devices report maxpacket size as 4 for their BULK EPs
which is incorrect as per USB specification. This results in
ep_config command to controller timing out and enumeration fails.
As minimum maxpacket size for FS is 8, override the same for such
devices.
CRs-fixed: 1002876
Change-Id: I70c2210b4eb93f557eef306fcbc11308b7b33e07
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
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Add null pointer check before dereferencing pointers.
Change-Id: I9d96a3d0e7d00ffc2c2eb83a0d2384a21fe994ae
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
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Replenish trigger threshold for LAN_CONS is calculated
before updating the rx_pool_sz. This can result into
division by 0 which can make the system unstable.
Make a change to update the rx_pool_sz before updating
the replenish trigger threshold.
Change-Id: I62f6c114ce7aee571833ef05146ab75cab0fb5d2
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
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Separate out the aggre2_noc voters so that individual voters could vote on
these clocks and voter clock would aggregate the clock rates before sending
a request to RPM.
Change-Id: I8ef30af257d2f37ec5af6aa5e3d1b69e5ba8ec8c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Handle SSR, daemon kill and restart scenarios for audio PD
Change-Id: If9c9e98642ad69866b19a7c0ea19160dcb357d34
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
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This change on arrival of ssr event schdule a worker thread,
which when run carry out task of qmi handle destruction.
It is a desired change to make ssr notification callback as
light as possible and avoid blocking it for long in corner cases.
Change-Id: I832fabce7569b1b8b966b7c49cda1b00cff2c472
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
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Commit b953b45ed08c ("USB: composite: Release spinlock before
WARN()") introduced a bug where it leads to calling spin_unlock_
irq_save twice in case of delayed_status zero. Hence fix the issue
by returning from composite_setup_continue() right after WARN() in
case of delayed_status zero.
Change-Id: I33c77ec8a2f97fcd94cffb416e57f3c77d6789f2
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
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The wlan firmware is configuring the clk and voltage regulator
for hardware power on and hardware reset sequence.
The icnss platform driver is configuring this clk and regulators
to avoid invalid access to copy engine register during the wlan
recovery.
As platform driver is not configuring this regulator to power on
or reset the WLAN hardware, So no need to define the voltage
regulators are the required properties for the ICNSS platform driver.
Define vdd-0.8-cx-mx as an optional voltage regulator for
the icnss platform driver.
CRs-Fixed: 2014965
Change-Id: I74a1445522997ba4e7a52da5a29e9afb57ad12df
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>
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Currently the HVDCP auth IRQ is only enabled upon USB removal. When APSD
is rerun the USB type is not updated to HVDCP_3 since the IRQ was
disabled.
Fix this by enabling the HVDCP auth IRQ before APSD is rerun.
Change-Id: Ic9ec2dca5915651864582abea9165ca8c4290169
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
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As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So make it possible to select
the best clocksource right after arm arch timer initialization, so that
jiffies can be increased by multiple counts since then.
Change-Id: Id8c4e3ce9b9e44061fef7ad7e678ca1c27d84bb1
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
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Return immediately from idle enter if there is no mode
selected. Log idle exit as failure to enter LPM in the
events that cpu needs to be rescheduled for another task.
Change-Id: I25a444682a8f8c9060f426c03e2f183f86d2fa3a
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
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The source clock of MMPLL10 has better jitter specs for MCLK than GPLL0_DIV
clock, so update the same to obtain 24MHz clock.
Change-Id: I57a77a83a5028c85d82fda4af53732f0bfb263e7
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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This now declares a module parameter, so include the necessary
header file for that.
Change-Id: I430c996ef2d35d0af86ab0822baccdf477db229e
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Git-commit: 949c2d0096753d518ef6e0bd8418c8086747196b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
Signed-off-by: Maya Erez <merez@codeaurora.org>
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