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Update cpufreq driver to adapt to opensource clock framework
Opensource clock framework dev_clk_get returns with the
different clock handle for all cpu cores with same clock source
This is different in the existing clock framework where
dev_clk_get returns with the same clock handle for the cores
which shares the same clock source.
Cpufreq driver was compatible with the existing clock
framework but with the opensource clock framework we need
to handle the different clock handles for all the cores
even the clock source is common.
Change-Id: Ic343bc20dc7c8b2ce151a5a2b5f85b43cdd949bf
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
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Ignore MSA0 dump collection during graceful shutdown. Collect
ramdump only when modem is really crashed.
CRs-Fixed: 1110935
Change-Id: Ic2fbfec320eb516224daad9ae78be07c61376cfc
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
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Fix checkpatch warnings and other style issues in the regulator
debugfs functions. Refactor the code to remove unnecessary error
checks as well as a shared buffer and mutex. Rename variables
and functions to better follow the naming conventions found in
the core.c file. Update the conditions used for allowing the
creation of 'voltage' and 'load' debugfs files.
Change-Id: I59881078ce9e908de11e74d15372edf233eb17b0
Signed-off-by: David Collins <collinsd@codeaurora.org>
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Existing SDE HW interrupt was based on mdp/kms and is not
sufficient for supporting the SDE HW interrupt manipulation.
Changes are for enabling full SDE interrupt support and hiding
HAL interface implementation details from crtc/encoder.
Change-Id: I917a153d12bbb6b84758591ba69fe15181af7791
Signed-off-by: Ben Chan <bkchan@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Cleanup the display probing logic now that the common display
interface is available.
Change-Id: I3a6f815d8e7ab7f22e719eaf7ef4c8150470d54f
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Call panels via common display-manager interface rather than directly.
Change-Id: I4fe86b6b206929217c0cf807a93287140d507e6c
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Add support in encoder for programming early fetch in the
vertical front porch.
Change-Id: I60fcf4a4e6aea80292b590ee14506579123f372d
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Split SDE encoder into virtual and physical encoders. Virtual
encoders are containers, one per logical display that contain
one or more physical encoders. Physical encoders manage the
INTF hardware.
Change-Id: I6342511c59568c76278a519b84f93338157e59fa
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Controller Instance ID differentiates between INTFs of the same type.
E.g. which DSI INTF is primary, which is secondary.
Change-Id: Icc47df59a24faa2a019ab190d6c835a0ac93024d
Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Implement basic crtc, encoder, and plane support that
implements DRM atomic call sequence, queries hardware, and
enumerates resources as DRM objects. This includes basic
color format support, as well as querying of displays
to create appropriate encoders, crtcs. Also includes
supporting clock control logic.
Change-Id: I25a9c74b92262d81986b3441c89d51bff2d14dbb
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Add msm_smmu driver to support mapping buffers to
arm smmu memory. msm_smmu adds the hooks to support
drm hooks. Current change only supports the unsecure
domain memory. msm_gem object is also updated to attach
the new msm_smmu driver.
Change-Id: I4899bd74d8b41b864ed5e0dec2da11e929c7fa95
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Initial DRM/KMS driver to support snapdragon display engine.
Change-Id: I2f93d7cd24acf77359682f90b6b9647017ed62ba
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Add catalog for DSI controller and phy drivers.
Change-Id: Iff7f55592834fef0230982282af5b8b2890f97a5
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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Add hardware driver for DSI controller v1.4.
Change-Id: I74a3b5ebbde1ca43b060d6e5ba2462fb66f0a3a8
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
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The change adds a synchronization mechanism to avoid concurrent
access to the TZ App.
CRs-Fixed: 1110588
Change-Id: I1ec37133eb7fe8c3fda498e6fe6661198163e07d
Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>
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For all rpm clocks, max rate request is going to RPM
during handoff which always shows max requested rate
value from APSS so fix the same.
Change-Id: I4f184ea053fc1a40830eb9f555c24fdf17ba3fa1
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
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If read function is waiting for interrupt and after that
NFCC goes to recovery, MW will call ioctl (0) and ioctl (1),
In ioctl (0) call we are disabling interrupt so read function
was waiting for interrupt and ioctl call has disabled interrupt,
now there is no possibility interrupt will be enabled again
because only read function enables the interrupt.
Enabled interrupt in ioctl (1) so that we can receive data
after reset/recovery.
Change-Id: I1677a50129534b1eaa4b8c20820a15db299cd9c1
Signed-off-by: Gaurav Singhal <gsinghal@codeaurora.org>
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Some platforms don't configure qcom,secondary-pon-reset like 8998.
So set boot_reason when "qcom,system-reset" node exists to avoid
setting a wrong value to boot_reason.
CRs-Fixed: 1102732
Change-Id: I9e9ff2f2d0ffac6baa5d0663664001eb30638e87
Signed-off-by: Mao Jinlong <c_jmao@codeaurora.org>
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Add IPA stats support on AP+STA mode for V2 driver
when CNE queries. Also add metering funtionality
on WIFI interface to stop the data transfer
when quota reached on WIFI-case.
Change-Id: I51a771423e6a35ea0453b978be484d0464bddf14
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
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GPU RBCPR clocks needs to registered separately, as GFX CPR would require
the rbcpr clocks to register the regulator handle.
Change-Id: I59def76e7dd69600be8faf47eb867a97ab04739e
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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Following are the changes made:
1. Add CLK_IGNORE_UNUSED flag for some clocks which are not
supposed to be disabled at late_init_level.
2. Fix clock measure debug mux value for mmcc clocks.
3. Add mmss_mdss_byte1_intf_div_clk for mdp.
4. Fix usb ref clocks to branch voted.
Change-Id: I06396c73f7855acfac283abe576e0b4cc1a92bd5
Signed-off-by: Taniya Das <tdas@codeaurora.org>
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qpnp_pin_debugfs_create() is going through all the child nodes
to create debugfs entries whereas the allocation for q_spec is
made only for available child nodes. This leads to a null pointer
access when CONFIG_GPIO_QPNP_PIN_DEBUG is selected in defconfig.
Fix it by using number of gpios available under each gpio chip
which was populated from the available child count already.
Change-Id: I17cbeeba158d34180763087103da4b03e01f7c90
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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