From 4ad04d8bc587f53e654817caa206043f7eefb766 Mon Sep 17 00:00:00 2001 From: Gilad Broner Date: Thu, 22 Jan 2015 14:50:01 -0800 Subject: scsi: ufs-qcom: change device reference clock control As of HW major version 2, bit 'UFS_DEV_REF_CLK_EN' which is used to gate/ungate the ref_clk to external UFS device, was moved into the UFS register space to UFS_CFG1 register. This change adds support to appropriately control the device reference clock and it also adds the missing documentation for the device reference clock control register address space. Change-Id: I66a6a75dc5a1cf130b1cee90ae20f9f950edfb3a Signed-off-by: Gilad Broner [subhashj@codeaurora.org: resolved trivial merge conflicts] Signed-off-by: Subhash Jadavani --- Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt index b43cb9883db6..93ba9b9c9f0c 100644 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt @@ -11,6 +11,8 @@ Required properties: "qcom,ufshc" - interrupts : - reg : + first entry should contain UFS host controller register address space (mandatory), + second entry is the device ref. clock control register map (optional). Optional properties: - phys : phandle to UFS PHY node @@ -57,7 +59,7 @@ regulators or clocks are always on. Example: ufshc@0xfc598000 { compatible = "jedec,ufs-1.1"; - reg = <0xfc598000 0x800>; + reg = <0xfc598000 0x800>, <0xfd512074 0x4>; interrupts = <0 28 0>; ufs-qcom-crypto = <&ufs_ice>; -- cgit v1.2.3