From 791e28b55c04a0c786d64dd8e8a2083b9a225a10 Mon Sep 17 00:00:00 2001 From: Tirupathi Reddy Date: Tue, 17 Jan 2017 12:23:22 +0530 Subject: ARM: dts: msm: Enable ACD functionality for SDM660 silver cluster The adaptive clock distribution (ACD) mitigates the impact of high-frequency supply voltage (VDD) droops on microprocessor performance. Program ACD functional configuration for silver cluster of sdm660. Also add the voltage margin savings with ACD to the existing APC0 CPR closed-loop voltage margins. Also set CPR_RAMP_EN and VCTL_RAMP_EN bits to 1 in AVS control register of silver cluster. Change-Id: Iaff7769cd1e71bbeb773658d0649092bff6e8916 Signed-off-by: Tirupathi Reddy --- arch/arm/boot/dts/qcom/sdm660-pm.dtsi | 2 +- arch/arm/boot/dts/qcom/sdm660-regulator.dtsi | 4 ++-- arch/arm/boot/dts/qcom/sdm660.dtsi | 12 ++++++++++-- 3 files changed, 13 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/sdm660-pm.dtsi b/arch/arm/boot/dts/qcom/sdm660-pm.dtsi index 21fab4923331..cdf1e47665fb 100644 --- a/arch/arm/boot/dts/qcom/sdm660-pm.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-pm.dtsi @@ -39,7 +39,7 @@ qcom,vctl-timeout-us = <500>; qcom,vctl-port = <0x0>; qcom,phase-port = <0x1>; - qcom,saw2-avs-ctl = <0x1010031>; + qcom,saw2-avs-ctl = <0x101c031>; qcom,saw2-avs-limit = <0x4580458>; qcom,pfm-port = <0x2>; }; diff --git a/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi b/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi index 66bea3050586..a4111f6d1b94 100644 --- a/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-regulator.dtsi @@ -744,8 +744,8 @@ < (-4000) 4000 7000 19000 (-8000)>; qcom,cpr-closed-loop-voltage-fuse-adjustment = - <(-32000) (-30000) (-29000) (-23000) - (-21000)>; + <(-32000) (-30000) (-29000) (-38000) + (-36000)>; qcom,cpr-floor-to-ceiling-max-range = <32000 32000 32000 40000 44000 diff --git a/arch/arm/boot/dts/qcom/sdm660.dtsi b/arch/arm/boot/dts/qcom/sdm660.dtsi index b3c2f3c634c6..d1e4cc2b192a 100644 --- a/arch/arm/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660.dtsi @@ -1232,9 +1232,17 @@ compatible = "qcom,clk-cpu-osm"; reg = <0x179c0000 0x4000>, <0x17916000 0x1000>, <0x17816000 0x1000>, <0x179d1000 0x1000>, - <0x00784130 0x8>; + <0x00784130 0x8>, <0x17914800 0x800>; reg-names = "osm", "pwrcl_pll", "perfcl_pll", - "apcs_common", "perfcl_efuse"; + "apcs_common", "perfcl_efuse", + "pwrcl_acd"; + + qcom,acdtd-val = <0x0000a111 0x0000a111>; + qcom,acdcr-val = <0x002c5ffd 0x002c5ffd>; + qcom,acdsscr-val = <0x00000901 0x00000901>; + qcom,acdextint0-val = <0x2cf9ae8 0x2cf9ae8>; + qcom,acdextint1-val = <0x2cf9afe 0x2cf9afe>; + qcom,acdautoxfer-val = <0x00000015 0x00000015>; vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; vdd-perfcl-supply = <&apc1_perfcl_vreg>; -- cgit v1.2.3