From 0e37f88d9ad800f5dd94c9fc9dc304b4e9cb7d2c Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 18 Jan 2013 22:30:34 +0100 Subject: ARM: sunxi: Add pinctrl driver for Allwinner SoCs The Allwinner SoCs have an IP module that handle both the muxing and the GPIOs. This IP has 8 banks of 32 bits, with a number of pins actually useful for each of these banks varying from one to another, and depending on the SoC used on the board. This driver only implements the pinctrl part, the gpio part will come eventually. Acked-by: Arnd Bergmann Acked-by: Olof Johansson Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/mach-sunxi/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 3fdd0085e306..8709a39bd34c 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -7,3 +7,4 @@ config ARCH_SUNXI select PINCTRL select SPARSE_IRQ select SUNXI_TIMER + select PINCTRL_SUNXI \ No newline at end of file -- cgit v1.2.3 From 9e2dcb2f3c10fbb135ce2a5cddd2c6133429b24d Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 18 Jan 2013 22:30:36 +0100 Subject: ARM: sunxi: Add pinctrl node to the device tree Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/boot/dts/sun5i-a13.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 59a2d265a98e..707bef50d2fe 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -17,4 +17,13 @@ memory { reg = <0x40000000 0x20000000>; }; + + soc { + pinctrl@01c20800 { + compatible = "allwinner,sun5i-a13-pinctrl"; + reg = <0x01c20800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; -- cgit v1.2.3 From 4348cc643a3ccf2e496152e2407b9ef6a52b952a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 18 Jan 2013 22:30:37 +0100 Subject: ARM: sunxi: Add uart1 pinctrl groups Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/boot/dts/sun5i-a13.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 707bef50d2fe..e1121890fb29 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -24,6 +24,20 @@ reg = <0x01c20800 0x400>; #address-cells = <1>; #size-cells = <0>; + + uart1_pins_a: uart1@0 { + allwinner,pins = "PE10", "PE11"; + allwinner,function = "uart1"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + uart1_pins_b: uart1@1 { + allwinner,pins = "PG3", "PG4"; + allwinner,function = "uart1"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; }; }; -- cgit v1.2.3 From c54729eeb05d65a77975ca042cc334b32baa86f4 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Fri, 18 Jan 2013 22:30:39 +0100 Subject: ARM: sunxi: olinuxino: Add muxing for the uart Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 498a091a4ea2..4a1e45d4aace 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -24,6 +24,8 @@ soc { uart1: uart@01c28400 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_b>; status = "okay"; }; }; -- cgit v1.2.3 From e590b91e8a6225a96f3f6438c4cea3682f16b515 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 26 Jan 2013 15:36:51 +0100 Subject: ARM: sunxi: Increase the number of GPIOs available The Allwinner A10 has 9 banks of 32 GPIOs available, so it doesn't fit in the usual 256 limit set by gpio.h. Increase this number to 288. Acked-by: Arnd Bergmann Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 67874b82a4ed..9c635b6cc3ea 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1637,7 +1637,7 @@ config ARCH_NR_GPIO default 355 if ARCH_U8500 default 264 if MACH_H4700 default 512 if SOC_OMAP5 - default 288 if ARCH_VT8500 + default 288 if ARCH_VT8500 || ARCH_SUNXI default 0 help Maximum number of GPIOs in the system. -- cgit v1.2.3 From 874b4e451527ae1ad290b148ceac0662702d4ff2 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 26 Jan 2013 15:36:54 +0100 Subject: ARM: sunxi: Add the sun4i pinctrl and gpio nodes Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/boot/dts/sun4i-a10.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index e61fdd47bd01..73e0dd5a298a 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -16,4 +16,13 @@ memory { reg = <0x40000000 0x80000000>; }; + + soc { + pinctrl@01c20800 { + compatible = "allwinner,sun4i-a10-pinctrl"; + reg = <0x01c20800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; -- cgit v1.2.3 From 581981be24f9866b37af535f947da2e7b65aaa53 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 26 Jan 2013 15:36:55 +0100 Subject: ARM: sunxi: Add the pin groups for UART0 and UART1 on sun4i Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij --- arch/arm/boot/dts/sun4i-a10.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 73e0dd5a298a..f99f60dadf5d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -23,6 +23,27 @@ reg = <0x01c20800 0x400>; #address-cells = <1>; #size-cells = <0>; + + uart0_pins_a: uart0@0 { + allwinner,pins = "PB22", "PB23"; + allwinner,function = "uart0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + uart0_pins_b: uart0@1 { + allwinner,pins = "PF2", "PF4"; + allwinner,function = "uart0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + uart1_pins_a: uart1@0 { + allwinner,pins = "PA10", "PA11"; + allwinner,function = "uart1"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; }; }; -- cgit v1.2.3