From f464ff581c247d82fcc0e7ef40c1ca6df9739068 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 19 Nov 2008 10:40:55 -0800 Subject: powerpc/85xx: L2 cache size wrong in 8572DS dts It's 1MB, not 512KB. Newer U-Boots will fix this entry, but that's no reason to have the wrong value in the dts. Signed-off-by: Trent Piepho Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8572ds.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index cadd4652a695..5c69b2fafd32 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -90,7 +90,7 @@ compatible = "fsl,mpc8572-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K + cache-size = <0x100000>; // L2, 1M interrupt-parent = <&mpic>; interrupts = <16 2>; }; -- cgit v1.2.3 From e871809cccc11aaa072afaf746f8fd946d2d9cac Mon Sep 17 00:00:00 2001 From: Michael Barkowski Date: Thu, 13 Nov 2008 10:18:28 -0500 Subject: powerpc/mpc832x_rdb: fix swapped ethernet ids ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so that the interfaces do not swap addresses when control passes from U-Boot to the kernel. Signed-off-by: Michael Barkowski Acked-by: Kim Phillips Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc832x_rdb.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts index 226ff066652b..dea30910c136 100644 --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts @@ -18,8 +18,8 @@ #size-cells = <1>; aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; + ethernet0 = &enet1; + ethernet1 = &enet0; serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; -- cgit v1.2.3