From 6d3288e6d51848e7cb03ef910a74eb6ae82be7a6 Mon Sep 17 00:00:00 2001 From: Amit Nischal Date: Wed, 15 Feb 2017 14:32:01 +0530 Subject: clk: qcom: Add support to list registers for slew PLL For slew PLL, register content is required to be displayed for debug purpose. Add support for the same by adding list_register clock ops to clk_alpha_pll_slew_ops. Change-Id: I806edd4d62ff00a4b36d17942afd746b03616534 Signed-off-by: Amit Nischal --- drivers/clk/qcom/clk-alpha-pll.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/qcom') diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 375f1420f3bb..0a8d73049b81 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -858,5 +858,6 @@ const struct clk_ops clk_alpha_pll_slew_ops = { .recalc_rate = clk_alpha_pll_recalc_rate, .round_rate = clk_alpha_pll_round_rate, .set_rate = clk_alpha_pll_slew_set_rate, + .list_registers = clk_alpha_pll_list_registers, }; EXPORT_SYMBOL_GPL(clk_alpha_pll_slew_ops); -- cgit v1.2.3