From dec759d8ef01b3edd5ceb9832ce2338c6c396d11 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Tue, 17 Sep 2013 10:26:24 +0100 Subject: clk: ux500: Provide u8500_clk with skeleton Device Tree support The functional components will be added on a per-clock basis. Acked-by: Mike Turquette Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- drivers/clk/ux500/u8500_of_clk.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'drivers/clk/ux500') diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c index ceebce6a624f..bfbe3cae72d7 100644 --- a/drivers/clk/ux500/u8500_of_clk.c +++ b/drivers/clk/ux500/u8500_of_clk.c @@ -7,6 +7,7 @@ * License terms: GNU General Public License (GPL) version 2 */ +#include #include #include #include @@ -14,13 +15,27 @@ #include #include "clk.h" +static const struct of_device_id u8500_clk_of_match[] = { + { .compatible = "stericsson,u8500-clks", }, + { }, +}; + void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, u32 clkrst5_base, u32 clkrst6_base) { struct prcmu_fw_version *fw_version; + struct device_node *np = NULL; + struct device_node *child = NULL; const char *sgaclk_parent = NULL; struct clk *clk; + if (of_have_populated_dt()) + np = of_find_matching_node(NULL, u8500_clk_of_match); + if (!np) { + pr_err("Either DT or U8500 Clock node not found\n"); + return; + } + /* Clock sources */ clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0, CLK_IS_ROOT|CLK_IGNORE_UNUSED); @@ -378,4 +393,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, /* Periph6 */ clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk", clkrst6_base, BIT(0), CLK_SET_RATE_GATE); + + for_each_child_of_node(np, child) { + /* Place holder for supported nodes. */ + } } -- cgit v1.2.3