From 96616eab7e474dc677185c4db66204b113f471cc Mon Sep 17 00:00:00 2001 From: Padmanabhan Komanduru Date: Thu, 1 Sep 2016 12:53:18 +0530 Subject: msm: mdss: fix 32-bit compilation errors in MDSS PP/interfaces Add required changes to fix 32-bit compilation issues in MDSS PP and DP/HDMI interface drivers. Change-Id: I0b342c0307b257cb8c66fcae73dd94d0fb3122db Signed-off-by: Padmanabhan Komanduru --- drivers/clk/msm/mdss/mdss-hdmi-pll-cobalt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/clk') diff --git a/drivers/clk/msm/mdss/mdss-hdmi-pll-cobalt.c b/drivers/clk/msm/mdss/mdss-hdmi-pll-cobalt.c index d5d55a58bf7f..c4f77e01b682 100644 --- a/drivers/clk/msm/mdss/mdss-hdmi-pll-cobalt.c +++ b/drivers/clk/msm/mdss/mdss-hdmi-pll-cobalt.c @@ -145,7 +145,7 @@ static void hdmi_cobalt_get_div(struct cobalt_reg_cfg *cfg, unsigned long pclk) u32 const min_freq = 8000, max_freq = 12000; u32 const cmp_cnt = 1024; u32 const th_min = 500, th_max = 1000; - u64 bit_clk = pclk * HDMI_BIT_CLK_TO_PIX_CLK_RATIO; + u64 bit_clk = ((u64)pclk) * HDMI_BIT_CLK_TO_PIX_CLK_RATIO; u32 half_rate_mode = 0; u32 freq_optimal, list_elements; int optimal_index; @@ -161,7 +161,7 @@ find_optimal_index: for (i = 0; i < sz_ratio; i++) { for (j = 0; j < sz_band; j++) { - u64 freq = (bit_clk / (1 << half_rate_mode)); + u64 freq = div_u64(bit_clk, (1 << half_rate_mode)); freq *= (ratio_list[i] * (1 << band_list[j])); do_div(freq, (u64) HDMI_MHZ_TO_HZ); -- cgit v1.2.3