From 99f09bebbe4e9e008a4e0555340494840c6bd644 Mon Sep 17 00:00:00 2001 From: Donggeun Kim Date: Thu, 24 Nov 2011 18:12:18 +0900 Subject: misc: Add driver support for MAX8997 MUIC The MUIC function in MAX8997 device can be used as a USB port detector and switch. This patch supports the MUIC feature of MAX8997. Signed-off-by: Donggeun Kim Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park Signed-off-by: Samuel Ortiz --- drivers/misc/Kconfig | 8 + drivers/misc/Makefile | 1 + drivers/misc/max8997-muic.c | 634 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 643 insertions(+) create mode 100644 drivers/misc/max8997-muic.c (limited to 'drivers/misc') diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 5664696f2d3a..6a1a092db146 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -500,6 +500,14 @@ config USB_SWITCH_FSA9480 stereo and mono audio, video, microphone and UART data to use a common connector port. +config MAX8997_MUIC + tristate "MAX8997 MUIC Support" + depends on MFD_MAX8997 + help + If you say yes here you get support for the MUIC device of + Maxim MAX8997 PMIC. + The MAX8997 MUIC is a USB port accessory detector and switch. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" source "drivers/misc/cb710/Kconfig" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index b26495a02554..3e1d80106f04 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -48,3 +48,4 @@ obj-y += lis3lv02d/ obj-y += carma/ obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/ +obj-$(CONFIG_MAX8997_MUIC) += max8997-muic.o diff --git a/drivers/misc/max8997-muic.c b/drivers/misc/max8997-muic.c new file mode 100644 index 000000000000..74a9448a93d2 --- /dev/null +++ b/drivers/misc/max8997-muic.c @@ -0,0 +1,634 @@ +/* + * max8997-muic.c - MAX8997 muic driver for the Maxim 8997 + * + * Copyright (C) 2011 Samsung Electrnoics + * Donggeun Kim + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* MAX8997-MUIC STATUS1 register */ +#define STATUS1_ADC_SHIFT 0 +#define STATUS1_ADCLOW_SHIFT 5 +#define STATUS1_ADCERR_SHIFT 6 +#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) +#define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) +#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) + +/* MAX8997-MUIC STATUS2 register */ +#define STATUS2_CHGTYP_SHIFT 0 +#define STATUS2_CHGDETRUN_SHIFT 3 +#define STATUS2_DCDTMR_SHIFT 4 +#define STATUS2_DBCHG_SHIFT 5 +#define STATUS2_VBVOLT_SHIFT 6 +#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) +#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) +#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) +#define STATUS2_DBCHG_MASK (0x1 << STATUS2_DBCHG_SHIFT) +#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) + +/* MAX8997-MUIC STATUS3 register */ +#define STATUS3_OVP_SHIFT 2 +#define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT) + +/* MAX8997-MUIC CONTROL1 register */ +#define COMN1SW_SHIFT 0 +#define COMP2SW_SHIFT 3 +#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) +#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) +#define SW_MASK (COMP2SW_MASK | COMN1SW_MASK) + +#define MAX8997_SW_USB ((1 << COMP2SW_SHIFT) | (1 << COMN1SW_SHIFT)) +#define MAX8997_SW_AUDIO ((2 << COMP2SW_SHIFT) | (2 << COMN1SW_SHIFT)) +#define MAX8997_SW_UART ((3 << COMP2SW_SHIFT) | (3 << COMN1SW_SHIFT)) +#define MAX8997_SW_OPEN ((0 << COMP2SW_SHIFT) | (0 << COMN1SW_SHIFT)) + +#define MAX8997_ADC_GROUND 0x00 +#define MAX8997_ADC_MHL 0x01 +#define MAX8997_ADC_JIG_USB_1 0x18 +#define MAX8997_ADC_JIG_USB_2 0x19 +#define MAX8997_ADC_DESKDOCK 0x1a +#define MAX8997_ADC_JIG_UART 0x1c +#define MAX8997_ADC_CARDOCK 0x1d +#define MAX8997_ADC_OPEN 0x1f + +struct max8997_muic_irq { + unsigned int irq; + const char *name; +}; + +static struct max8997_muic_irq muic_irqs[] = { + { MAX8997_MUICIRQ_ADCError, "muic-ADC_error" }, + { MAX8997_MUICIRQ_ADCLow, "muic-ADC_low" }, + { MAX8997_MUICIRQ_ADC, "muic-ADC" }, + { MAX8997_MUICIRQ_VBVolt, "muic-VB_voltage" }, + { MAX8997_MUICIRQ_DBChg, "muic-DB_charger" }, + { MAX8997_MUICIRQ_DCDTmr, "muic-DCD_timer" }, + { MAX8997_MUICIRQ_ChgDetRun, "muic-CDR_status" }, + { MAX8997_MUICIRQ_ChgTyp, "muic-charger_type" }, + { MAX8997_MUICIRQ_OVP, "muic-over_voltage" }, +}; + +struct max8997_muic_info { + struct device *dev; + struct max8997_dev *iodev; + struct i2c_client *muic; + struct max8997_muic_platform_data *muic_pdata; + + int irq; + struct work_struct irq_work; + + enum max8997_muic_charger_type pre_charger_type; + int pre_adc; + + struct mutex mutex; +}; + +static int max8997_muic_handle_usb(struct max8997_muic_info *info, + enum max8997_muic_usb_type usb_type, bool attached) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + int ret = 0; + + if (usb_type == MAX8997_USB_HOST) { + /* switch to USB */ + ret = max8997_update_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, + attached ? MAX8997_SW_USB : MAX8997_SW_OPEN, + SW_MASK); + if (ret) { + dev_err(info->dev, "failed to update muic register\n"); + goto out; + } + } + + if (mdata->usb_callback) + mdata->usb_callback(usb_type, attached); +out: + return ret; +} + +static void max8997_muic_handle_mhl(struct max8997_muic_info *info, + bool attached) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + + if (mdata->mhl_callback) + mdata->mhl_callback(attached); +} + +static int max8997_muic_handle_dock(struct max8997_muic_info *info, + int adc, bool attached) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + int ret = 0; + + /* switch to AUDIO */ + ret = max8997_update_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, + attached ? MAX8997_SW_AUDIO : MAX8997_SW_OPEN, + SW_MASK); + if (ret) { + dev_err(info->dev, "failed to update muic register\n"); + goto out; + } + + switch (adc) { + case MAX8997_ADC_DESKDOCK: + if (mdata->deskdock_callback) + mdata->deskdock_callback(attached); + break; + case MAX8997_ADC_CARDOCK: + if (mdata->cardock_callback) + mdata->cardock_callback(attached); + break; + default: + break; + } +out: + return ret; +} + +static int max8997_muic_handle_jig_uart(struct max8997_muic_info *info, + bool attached) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + int ret = 0; + + /* switch to UART */ + ret = max8997_update_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, + attached ? MAX8997_SW_UART : MAX8997_SW_OPEN, + SW_MASK); + if (ret) { + dev_err(info->dev, "failed to update muic register\n"); + goto out; + } + + if (mdata->uart_callback) + mdata->uart_callback(attached); +out: + return ret; +} + +static int max8997_muic_handle_adc_detach(struct max8997_muic_info *info) +{ + int ret = 0; + + switch (info->pre_adc) { + case MAX8997_ADC_GROUND: + ret = max8997_muic_handle_usb(info, MAX8997_USB_HOST, false); + break; + case MAX8997_ADC_MHL: + max8997_muic_handle_mhl(info, false); + break; + case MAX8997_ADC_JIG_USB_1: + case MAX8997_ADC_JIG_USB_2: + ret = max8997_muic_handle_usb(info, MAX8997_USB_DEVICE, false); + break; + case MAX8997_ADC_DESKDOCK: + case MAX8997_ADC_CARDOCK: + ret = max8997_muic_handle_dock(info, info->pre_adc, false); + break; + case MAX8997_ADC_JIG_UART: + ret = max8997_muic_handle_jig_uart(info, false); + break; + default: + break; + } + + return ret; +} + +static int max8997_muic_handle_adc(struct max8997_muic_info *info, int adc) +{ + int ret = 0; + + switch (adc) { + case MAX8997_ADC_GROUND: + ret = max8997_muic_handle_usb(info, MAX8997_USB_HOST, true); + break; + case MAX8997_ADC_MHL: + max8997_muic_handle_mhl(info, true); + break; + case MAX8997_ADC_JIG_USB_1: + case MAX8997_ADC_JIG_USB_2: + ret = max8997_muic_handle_usb(info, MAX8997_USB_DEVICE, true); + break; + case MAX8997_ADC_DESKDOCK: + case MAX8997_ADC_CARDOCK: + ret = max8997_muic_handle_dock(info, adc, true); + break; + case MAX8997_ADC_JIG_UART: + ret = max8997_muic_handle_jig_uart(info, true); + break; + case MAX8997_ADC_OPEN: + ret = max8997_muic_handle_adc_detach(info); + break; + default: + break; + } + + info->pre_adc = adc; + + return ret; +} + +static int max8997_muic_handle_charger_type(struct max8997_muic_info *info, + enum max8997_muic_charger_type charger_type) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + u8 adc; + int ret; + + ret = max8997_read_reg(info->muic, MAX8997_MUIC_REG_STATUS1, &adc); + if (ret) { + dev_err(info->dev, "failed to read muic register\n"); + goto out; + } + + switch (charger_type) { + case MAX8997_CHARGER_TYPE_NONE: + if (mdata->charger_callback) + mdata->charger_callback(false, charger_type); + if (info->pre_charger_type == MAX8997_CHARGER_TYPE_USB) { + max8997_muic_handle_usb(info, + MAX8997_USB_DEVICE, false); + } + break; + case MAX8997_CHARGER_TYPE_USB: + if ((adc & STATUS1_ADC_MASK) == MAX8997_ADC_OPEN) { + max8997_muic_handle_usb(info, + MAX8997_USB_DEVICE, true); + } + if (mdata->charger_callback) + mdata->charger_callback(true, charger_type); + break; + case MAX8997_CHARGER_TYPE_DOWNSTREAM_PORT: + case MAX8997_CHARGER_TYPE_DEDICATED_CHG: + case MAX8997_CHARGER_TYPE_500MA: + case MAX8997_CHARGER_TYPE_1A: + if (mdata->charger_callback) + mdata->charger_callback(true, charger_type); + break; + default: + break; + } + + info->pre_charger_type = charger_type; +out: + return ret; +} + +static void max8997_muic_irq_work(struct work_struct *work) +{ + struct max8997_muic_info *info = container_of(work, + struct max8997_muic_info, irq_work); + struct max8997_platform_data *pdata = + dev_get_platdata(info->iodev->dev); + char env_name_str[30], env_state_str[15]; + char *envp[] = { env_name_str, env_state_str, NULL }; + u8 status[3]; + u8 adc, adc_low, adc_err; + u8 vb_volt, db_chg, dcd_tmr, cdr, chg_type, ovp; + + int irq_type = info->irq - pdata->irq_base; + int ret; + + mutex_lock(&info->mutex); + + ret = max8997_bulk_read(info->muic, MAX8997_MUIC_REG_STATUS1, + 3, status); + if (ret) { + dev_err(info->dev, "failed to read muic register\n"); + mutex_unlock(&info->mutex); + return; + } + + dev_dbg(info->dev, "%s: STATUS1:0x%x, 2:0x%x\n", __func__, + status[0], status[1]); + + switch (irq_type) { + case MAX8997_MUICIRQ_ADCError: + adc_err = status[0] & STATUS1_ADCERR_MASK; + adc_err >>= STATUS1_ADCERR_SHIFT; + sprintf(env_name_str, "IRQ=%s", "ADC_Error"); + sprintf(env_state_str, "STATE=%d", adc_err); + break; + case MAX8997_MUICIRQ_ADCLow: + adc_low = status[0] & STATUS1_ADCLOW_MASK; + adc_low >>= STATUS1_ADCLOW_SHIFT; + sprintf(env_name_str, "IRQ=%s", "ADC_Low"); + sprintf(env_state_str, "STATE=%d", adc_low); + break; + case MAX8997_MUICIRQ_ADC: + adc = status[0] & STATUS1_ADC_MASK; + adc >>= STATUS1_ADC_SHIFT; + + max8997_muic_handle_adc(info, adc); + + sprintf(env_name_str, "IRQ=%s", "ADC"); + sprintf(env_state_str, "STATE=%d", adc); + break; + case MAX8997_MUICIRQ_VBVolt: + vb_volt = status[1] & STATUS2_VBVOLT_MASK; + vb_volt >>= STATUS2_VBVOLT_SHIFT; + sprintf(env_name_str, "IRQ=%s", "VB_Volt"); + sprintf(env_state_str, "STATE=%d", vb_volt); + break; + case MAX8997_MUICIRQ_DBChg: + db_chg = status[1] & STATUS2_DBCHG_MASK; + db_chg >>= STATUS2_DBCHG_SHIFT; + sprintf(env_name_str, "IRQ=%s", "DB_CHARGER"); + sprintf(env_state_str, "STATE=%d", db_chg); + break; + case MAX8997_MUICIRQ_DCDTmr: + dcd_tmr = status[1] & STATUS2_DCDTMR_MASK; + dcd_tmr >>= STATUS2_DCDTMR_SHIFT; + sprintf(env_name_str, "IRQ=%s", "DCD_TIMER"); + sprintf(env_state_str, "STATE=%d", dcd_tmr); + break; + case MAX8997_MUICIRQ_ChgDetRun: + cdr = status[1] & STATUS2_CHGDETRUN_MASK; + cdr >>= STATUS2_CHGDETRUN_SHIFT; + sprintf(env_name_str, "IRQ=%s", "CHG_DET_RUN"); + sprintf(env_state_str, "STATE=%d", cdr); + break; + case MAX8997_MUICIRQ_ChgTyp: + chg_type = status[1] & STATUS2_CHGTYP_MASK; + chg_type >>= STATUS2_CHGTYP_SHIFT; + + max8997_muic_handle_charger_type(info, chg_type); + + sprintf(env_name_str, "IRQ=%s", "CHARGER_TYPE"); + sprintf(env_state_str, "STATE=%d", chg_type); + break; + case MAX8997_MUICIRQ_OVP: + ovp = status[2] & STATUS3_OVP_MASK; + ovp >>= STATUS3_OVP_SHIFT; + sprintf(env_name_str, "IRQ=%s", "OVER-VOLTAGE"); + sprintf(env_state_str, "STATE=%d", ovp); + break; + default: + break; + } + + kobject_uevent_env(&info->dev->kobj, KOBJ_CHANGE, envp); + + mutex_unlock(&info->mutex); + + return; +} + +static irqreturn_t max8997_muic_irq_handler(int irq, void *data) +{ + struct max8997_muic_info *info = data; + + dev_dbg(info->dev, "irq:%d\n", irq); + info->irq = irq; + + schedule_work(&info->irq_work); + + return IRQ_HANDLED; +} + +static void max8997_muic_detect_dev(struct max8997_muic_info *info) +{ + int ret; + u8 status[2], adc, chg_type; + + ret = max8997_bulk_read(info->muic, MAX8997_MUIC_REG_STATUS1, + 2, status); + if (ret) { + dev_err(info->dev, "failed to read muic register\n"); + return; + } + + dev_info(info->dev, "STATUS1:0x%x, STATUS2:0x%x\n", + status[0], status[1]); + + adc = status[0] & STATUS1_ADC_MASK; + adc >>= STATUS1_ADC_SHIFT; + + chg_type = status[1] & STATUS2_CHGTYP_MASK; + chg_type >>= STATUS2_CHGTYP_SHIFT; + + max8997_muic_handle_adc(info, adc); + max8997_muic_handle_charger_type(info, chg_type); +} + +static ssize_t max8997_muic_show_manualsw(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct max8997_muic_info *info = dev_get_drvdata(dev); + int ret; + u8 value, manual_switch; + + ret = max8997_read_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, &value); + if (ret) { + dev_err(info->dev, "failed to read muic register\n"); + return sprintf(buf, "UNKNOWN\n"); + } + + manual_switch = value & (COMN1SW_MASK | COMP2SW_MASK); + + switch (manual_switch) { + case MAX8997_SW_USB: + return sprintf(buf, "USB\n"); + case MAX8997_SW_AUDIO: + return sprintf(buf, "AUDIO\n"); + case MAX8997_SW_UART: + return sprintf(buf, "UART\n"); + default: + return sprintf(buf, "OPEN\n"); + } +} + +static ssize_t max8997_muic_store_manualsw(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct max8997_muic_info *info = dev_get_drvdata(dev); + int ret; + u8 manual_switch; + + if (!strncmp(buf, "USB", 3)) { + manual_switch = MAX8997_SW_USB; + } else if (!strncmp(buf, "AUDIO", 5)) { + manual_switch = MAX8997_SW_AUDIO; + } else if (!strncmp(buf, "UART", 4)) { + manual_switch = MAX8997_SW_UART; + } else if (!strncmp(buf, "OPEN", 4)) { + manual_switch = MAX8997_SW_OPEN; + } else { + dev_err(info->dev, "invalid parameter\n"); + goto out; + } + + ret = max8997_update_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, + manual_switch, SW_MASK); + if (ret) + dev_err(info->dev, "failed to update muic register\n"); +out: + return count; +} + +static DEVICE_ATTR(switch, S_IRUGO | S_IWUSR, + max8997_muic_show_manualsw, max8997_muic_store_manualsw); + +static struct attribute *max8997_muic_attributes[] = { + &dev_attr_switch.attr, + NULL +}; + +static const struct attribute_group max8997_muic_group = { + .attrs = max8997_muic_attributes, +}; + +static void max8997_initialize_device(struct max8997_muic_info *info) +{ + struct max8997_muic_platform_data *mdata = info->muic_pdata; + int i; + + for (i = 0; i < mdata->num_init_data; i++) { + max8997_write_reg(info->muic, mdata->init_data[i].addr, + mdata->init_data[i].data); + } +} + +static int __devinit max8997_muic_probe(struct platform_device *pdev) +{ + struct max8997_dev *iodev = dev_get_drvdata(pdev->dev.parent); + struct max8997_platform_data *pdata = dev_get_platdata(iodev->dev); + struct max8997_muic_info *info; + int ret, i; + + info = kzalloc(sizeof(struct max8997_muic_info), GFP_KERNEL); + if (!info) { + dev_err(&pdev->dev, "failed to allocate memory\n"); + ret = -ENOMEM; + goto err_kfree; + } + + if (!pdata->muic_pdata) { + dev_err(&pdev->dev, "failed to get platform_data\n"); + ret = -EINVAL; + goto err_pdata; + } + info->muic_pdata = pdata->muic_pdata; + + info->dev = &pdev->dev; + info->iodev = iodev; + info->muic = iodev->muic; + + platform_set_drvdata(pdev, info); + mutex_init(&info->mutex); + + ret = sysfs_create_group(&pdev->dev.kobj, &max8997_muic_group); + if (ret) { + dev_err(&pdev->dev, + "failed to create max8997 muic attribute group\n"); + goto err_sysfs; + } + + INIT_WORK(&info->irq_work, max8997_muic_irq_work); + + for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) { + struct max8997_muic_irq *muic_irq = &muic_irqs[i]; + + ret = request_threaded_irq(pdata->irq_base + muic_irq->irq, + NULL, max8997_muic_irq_handler, + 0, muic_irq->name, + info); + if (ret) { + dev_err(&pdev->dev, + "failed: irq request (IRQ: %d," + " error :%d)\n", + muic_irq->irq, ret); + + for (i = i - 1; i >= 0; i--) + free_irq(muic_irq->irq, info); + + goto err_irq; + } + } + + /* Initialize registers according to platform data */ + max8997_initialize_device(info); + + /* Initial device detection */ + max8997_muic_detect_dev(info); + + return ret; + +err_irq: + sysfs_remove_group(&pdev->dev.kobj, &max8997_muic_group); +err_sysfs: +err_pdata: + kfree(info); +err_kfree: + return ret; +} + +static int __devexit max8997_muic_remove(struct platform_device *pdev) +{ + struct max8997_muic_info *info = platform_get_drvdata(pdev); + struct max8997_platform_data *pdata = + dev_get_platdata(info->iodev->dev); + int i; + + sysfs_remove_group(&pdev->dev.kobj, &max8997_muic_group); + + for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) + free_irq(pdata->irq_base + muic_irqs[i].irq, info); + + kfree(info); + + return 0; +} + +static struct platform_driver max8997_muic_driver = { + .driver = { + .name = "max8997-muic", + .owner = THIS_MODULE, + }, + .probe = max8997_muic_probe, + .remove = __devexit_p(max8997_muic_remove), +}; + +static int __init max8997_muic_init(void) +{ + return platform_driver_register(&max8997_muic_driver); +} +module_init(max8997_muic_init); + +static void __exit max8997_muic_exit(void) +{ + platform_driver_unregister(&max8997_muic_driver); +} +module_exit(max8997_muic_exit); + +MODULE_DESCRIPTION("Maxim MAX8997 MUIC driver"); +MODULE_AUTHOR("Donggeun Kim "); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From ee66e653ca7425bc8ffca4e00f19a8057cd14e4d Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 2 Dec 2011 14:16:33 +0100 Subject: mfd: Unify abx500 headers in mfd/abx500 This moves all the header files related to the abx500 family into a common include directory below mfd. From now on we place any subchip header in that directory. Headers previously in e.g. get prefixed and are now e.g. . The top-level abstract interface remains in . Signed-off-by: Linus Walleij Signed-off-by: Samuel Ortiz --- arch/arm/mach-ux500/board-mop500.c | 4 +- arch/arm/mach-ux500/board-u5500.c | 2 +- .../mach-ux500/include/mach/irqs-board-mop500.h | 2 +- drivers/input/misc/ab8500-ponkey.c | 2 +- drivers/mfd/ab5500-core.c | 2 +- drivers/mfd/ab5500-debugfs.c | 2 +- drivers/mfd/ab8500-core.c | 2 +- drivers/mfd/ab8500-debugfs.c | 2 +- drivers/mfd/ab8500-gpadc.c | 4 +- drivers/mfd/ab8500-i2c.c | 2 +- drivers/mfd/ab8500-sysctrl.c | 4 +- drivers/misc/ab8500-pwm.c | 2 +- drivers/regulator/ab8500.c | 2 +- drivers/rtc/rtc-ab8500.c | 2 +- drivers/usb/otg/ab8500-usb.c | 2 +- include/linux/mfd/ab5500/ab5500.h | 140 ------------ include/linux/mfd/ab8500.h | 201 ---------------- include/linux/mfd/ab8500/gpadc.h | 35 --- include/linux/mfd/ab8500/gpio.h | 21 -- include/linux/mfd/ab8500/sysctrl.h | 254 --------------------- include/linux/mfd/abx500/ab5500.h | 140 ++++++++++++ include/linux/mfd/abx500/ab8500-gpadc.h | 35 +++ include/linux/mfd/abx500/ab8500-gpio.h | 21 ++ include/linux/mfd/abx500/ab8500-sysctrl.h | 254 +++++++++++++++++++++ include/linux/mfd/abx500/ab8500.h | 201 ++++++++++++++++ 25 files changed, 669 insertions(+), 669 deletions(-) delete mode 100644 include/linux/mfd/ab5500/ab5500.h delete mode 100644 include/linux/mfd/ab8500.h delete mode 100644 include/linux/mfd/ab8500/gpadc.h delete mode 100644 include/linux/mfd/ab8500/gpio.h delete mode 100644 include/linux/mfd/ab8500/sysctrl.h create mode 100644 include/linux/mfd/abx500/ab5500.h create mode 100644 include/linux/mfd/abx500/ab8500-gpadc.h create mode 100644 include/linux/mfd/abx500/ab8500-gpio.h create mode 100644 include/linux/mfd/abx500/ab8500-sysctrl.h create mode 100644 include/linux/mfd/abx500/ab8500.h (limited to 'drivers/misc') diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index bdd7b80dd7ad..80cef36d71ce 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -19,11 +19,11 @@ #include #include #include -#include +#include #include #include #include -#include +#include #include #include #include diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index 82025ba70c03..4ecb07a93f14 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h index 47969909836c..d2d4131435a6 100644 --- a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h +++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h @@ -9,7 +9,7 @@ #define __MACH_IRQS_BOARD_MOP500_H /* Number of AB8500 irqs is taken from header file */ -#include +#include #define MOP500_AB8500_IRQ_BASE IRQ_BOARD_START #define MOP500_AB8500_IRQ_END (MOP500_AB8500_IRQ_BASE \ diff --git a/drivers/input/misc/ab8500-ponkey.c b/drivers/input/misc/ab8500-ponkey.c index 3d3288a78fdc..3f199e1539bf 100644 --- a/drivers/input/misc/ab8500-ponkey.c +++ b/drivers/input/misc/ab8500-ponkey.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include /** diff --git a/drivers/mfd/ab5500-core.c b/drivers/mfd/ab5500-core.c index ec10629a0b0b..bd56a764dea1 100644 --- a/drivers/mfd/ab5500-core.c +++ b/drivers/mfd/ab5500-core.c @@ -22,8 +22,8 @@ #include #include #include -#include #include +#include #include #include #include diff --git a/drivers/mfd/ab5500-debugfs.c b/drivers/mfd/ab5500-debugfs.c index b7b2d3483fd4..72006940937a 100644 --- a/drivers/mfd/ab5500-debugfs.c +++ b/drivers/mfd/ab5500-debugfs.c @@ -7,8 +7,8 @@ #include #include #include -#include #include +#include #include #include "ab5500-core.h" diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index d3d572b2317b..53e2a80f42fa 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include /* diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c index dedb7f65cea6..9a0211aa8897 100644 --- a/drivers/mfd/ab8500-debugfs.c +++ b/drivers/mfd/ab8500-debugfs.c @@ -13,7 +13,7 @@ #include #include -#include +#include static u32 debug_bank; static u32 debug_address; diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c index e985d1701a83..c39fc716e1dc 100644 --- a/drivers/mfd/ab8500-gpadc.c +++ b/drivers/mfd/ab8500-gpadc.c @@ -18,9 +18,9 @@ #include #include #include -#include #include -#include +#include +#include /* * GPADC register offsets diff --git a/drivers/mfd/ab8500-i2c.c b/drivers/mfd/ab8500-i2c.c index 9be541c6b004..087fecd71ce0 100644 --- a/drivers/mfd/ab8500-i2c.c +++ b/drivers/mfd/ab8500-i2c.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data) diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c index f20feefac190..c28d4eb1eff0 100644 --- a/drivers/mfd/ab8500-sysctrl.c +++ b/drivers/mfd/ab8500-sysctrl.c @@ -7,9 +7,9 @@ #include #include #include -#include #include -#include +#include +#include static struct device *sysctrl_dev; diff --git a/drivers/misc/ab8500-pwm.c b/drivers/misc/ab8500-pwm.c index 2208a9d52622..d7a9aa14e5d5 100644 --- a/drivers/misc/ab8500-pwm.c +++ b/drivers/misc/ab8500-pwm.c @@ -8,8 +8,8 @@ #include #include #include -#include #include +#include #include /* diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c index 6e1ae69646b3..80d08237a5a7 100644 --- a/drivers/regulator/ab8500.c +++ b/drivers/regulator/ab8500.c @@ -16,8 +16,8 @@ #include #include #include -#include #include +#include #include #include #include diff --git a/drivers/rtc/rtc-ab8500.c b/drivers/rtc/rtc-ab8500.c index e346705aae92..db16ce212d6b 100644 --- a/drivers/rtc/rtc-ab8500.c +++ b/drivers/rtc/rtc-ab8500.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #define AB8500_RTC_SOFF_STAT_REG 0x00 diff --git a/drivers/usb/otg/ab8500-usb.c b/drivers/usb/otg/ab8500-usb.c index 07ccea9ada40..74fe6e62e0f7 100644 --- a/drivers/usb/otg/ab8500-usb.c +++ b/drivers/usb/otg/ab8500-usb.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include #define AB8500_MAIN_WD_CTRL_REG 0x01 #define AB8500_USB_LINE_STAT_REG 0x80 diff --git a/include/linux/mfd/ab5500/ab5500.h b/include/linux/mfd/ab5500/ab5500.h deleted file mode 100644 index a720051ae933..000000000000 --- a/include/linux/mfd/ab5500/ab5500.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright (C) ST-Ericsson 2011 - * - * License Terms: GNU General Public License v2 - */ -#ifndef MFD_AB5500_H -#define MFD_AB5500_H - -#include - -enum ab5500_devid { - AB5500_DEVID_ADC, - AB5500_DEVID_LEDS, - AB5500_DEVID_POWER, - AB5500_DEVID_REGULATORS, - AB5500_DEVID_SIM, - AB5500_DEVID_RTC, - AB5500_DEVID_CHARGER, - AB5500_DEVID_FUELGAUGE, - AB5500_DEVID_VIBRATOR, - AB5500_DEVID_CODEC, - AB5500_DEVID_USB, - AB5500_DEVID_OTP, - AB5500_DEVID_VIDEO, - AB5500_DEVID_DBIECI, - AB5500_DEVID_ONSWA, - AB5500_NUM_DEVICES, -}; - -enum ab5500_banks { - AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP = 0, - AB5500_BANK_VDDDIG_IO_I2C_CLK_TST = 1, - AB5500_BANK_VDENC = 2, - AB5500_BANK_SIM_USBSIM = 3, - AB5500_BANK_LED = 4, - AB5500_BANK_ADC = 5, - AB5500_BANK_RTC = 6, - AB5500_BANK_STARTUP = 7, - AB5500_BANK_DBI_ECI = 8, - AB5500_BANK_CHG = 9, - AB5500_BANK_FG_BATTCOM_ACC = 10, - AB5500_BANK_USB = 11, - AB5500_BANK_IT = 12, - AB5500_BANK_VIBRA = 13, - AB5500_BANK_AUDIO_HEADSETUSB = 14, - AB5500_NUM_BANKS = 15, -}; - -enum ab5500_banks_addr { - AB5500_ADDR_VIT_IO_I2C_CLK_TST_OTP = 0x4A, - AB5500_ADDR_VDDDIG_IO_I2C_CLK_TST = 0x4B, - AB5500_ADDR_VDENC = 0x06, - AB5500_ADDR_SIM_USBSIM = 0x04, - AB5500_ADDR_LED = 0x10, - AB5500_ADDR_ADC = 0x0A, - AB5500_ADDR_RTC = 0x0F, - AB5500_ADDR_STARTUP = 0x03, - AB5500_ADDR_DBI_ECI = 0x07, - AB5500_ADDR_CHG = 0x0B, - AB5500_ADDR_FG_BATTCOM_ACC = 0x0C, - AB5500_ADDR_USB = 0x05, - AB5500_ADDR_IT = 0x0E, - AB5500_ADDR_VIBRA = 0x02, - AB5500_ADDR_AUDIO_HEADSETUSB = 0x0D, -}; - -/* - * Interrupt register offsets - * Bank : 0x0E - */ -#define AB5500_IT_SOURCE0_REG 0x20 -#define AB5500_IT_SOURCE1_REG 0x21 -#define AB5500_IT_SOURCE2_REG 0x22 -#define AB5500_IT_SOURCE3_REG 0x23 -#define AB5500_IT_SOURCE4_REG 0x24 -#define AB5500_IT_SOURCE5_REG 0x25 -#define AB5500_IT_SOURCE6_REG 0x26 -#define AB5500_IT_SOURCE7_REG 0x27 -#define AB5500_IT_SOURCE8_REG 0x28 -#define AB5500_IT_SOURCE9_REG 0x29 -#define AB5500_IT_SOURCE10_REG 0x2A -#define AB5500_IT_SOURCE11_REG 0x2B -#define AB5500_IT_SOURCE12_REG 0x2C -#define AB5500_IT_SOURCE13_REG 0x2D -#define AB5500_IT_SOURCE14_REG 0x2E -#define AB5500_IT_SOURCE15_REG 0x2F -#define AB5500_IT_SOURCE16_REG 0x30 -#define AB5500_IT_SOURCE17_REG 0x31 -#define AB5500_IT_SOURCE18_REG 0x32 -#define AB5500_IT_SOURCE19_REG 0x33 -#define AB5500_IT_SOURCE20_REG 0x34 -#define AB5500_IT_SOURCE21_REG 0x35 -#define AB5500_IT_SOURCE22_REG 0x36 -#define AB5500_IT_SOURCE23_REG 0x37 - -#define AB5500_NUM_IRQ_REGS 23 - -/** - * struct ab5500 - * @access_mutex: lock out concurrent accesses to the AB registers - * @dev: a pointer to the device struct for this chip driver - * @ab5500_irq: the analog baseband irq - * @irq_base: the platform configuration irq base for subdevices - * @chip_name: name of this chip variant - * @chip_id: 8 bit chip ID for this chip variant - * @irq_lock: a lock to protect the mask - * @abb_events: a local bit mask of the prcmu wakeup events - * @event_mask: a local copy of the mask event registers - * @last_event_mask: a copy of the last event_mask written to hardware - * @startup_events: a copy of the first reading of the event registers - * @startup_events_read: whether the first events have been read - */ -struct ab5500 { - struct mutex access_mutex; - struct device *dev; - unsigned int ab5500_irq; - unsigned int irq_base; - char chip_name[32]; - u8 chip_id; - struct mutex irq_lock; - u32 abb_events; - u8 mask[AB5500_NUM_IRQ_REGS]; - u8 oldmask[AB5500_NUM_IRQ_REGS]; - u8 startup_events[AB5500_NUM_IRQ_REGS]; - bool startup_events_read; -#ifdef CONFIG_DEBUG_FS - unsigned int debug_bank; - unsigned int debug_address; -#endif -}; - -struct ab5500_platform_data { - struct {unsigned int base; unsigned int count; } irq; - void *dev_data[AB5500_NUM_DEVICES]; - struct abx500_init_settings *init_settings; - unsigned int init_settings_sz; - bool pm_power_off; -}; - -#endif /* MFD_AB5500_H */ diff --git a/include/linux/mfd/ab8500.h b/include/linux/mfd/ab8500.h deleted file mode 100644 index 838c6b487cc5..000000000000 --- a/include/linux/mfd/ab8500.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * Author: Srinidhi Kasagar - */ -#ifndef MFD_AB8500_H -#define MFD_AB8500_H - -#include - -/* - * AB8500 bank addresses - */ -#define AB8500_SYS_CTRL1_BLOCK 0x1 -#define AB8500_SYS_CTRL2_BLOCK 0x2 -#define AB8500_REGU_CTRL1 0x3 -#define AB8500_REGU_CTRL2 0x4 -#define AB8500_USB 0x5 -#define AB8500_TVOUT 0x6 -#define AB8500_DBI 0x7 -#define AB8500_ECI_AV_ACC 0x8 -#define AB8500_RESERVED 0x9 -#define AB8500_GPADC 0xA -#define AB8500_CHARGER 0xB -#define AB8500_GAS_GAUGE 0xC -#define AB8500_AUDIO 0xD -#define AB8500_INTERRUPT 0xE -#define AB8500_RTC 0xF -#define AB8500_MISC 0x10 -#define AB8500_DEVELOPMENT 0x11 -#define AB8500_DEBUG 0x12 -#define AB8500_PROD_TEST 0x13 -#define AB8500_OTP_EMUL 0x15 - -/* - * Interrupts - */ - -#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0 -#define AB8500_INT_UN_PLUG_TV_DET 1 -#define AB8500_INT_PLUG_TV_DET 2 -#define AB8500_INT_TEMP_WARM 3 -#define AB8500_INT_PON_KEY2DB_F 4 -#define AB8500_INT_PON_KEY2DB_R 5 -#define AB8500_INT_PON_KEY1DB_F 6 -#define AB8500_INT_PON_KEY1DB_R 7 -#define AB8500_INT_BATT_OVV 8 -#define AB8500_INT_MAIN_CH_UNPLUG_DET 10 -#define AB8500_INT_MAIN_CH_PLUG_DET 11 -#define AB8500_INT_USB_ID_DET_F 12 -#define AB8500_INT_USB_ID_DET_R 13 -#define AB8500_INT_VBUS_DET_F 14 -#define AB8500_INT_VBUS_DET_R 15 -#define AB8500_INT_VBUS_CH_DROP_END 16 -#define AB8500_INT_RTC_60S 17 -#define AB8500_INT_RTC_ALARM 18 -#define AB8500_INT_BAT_CTRL_INDB 20 -#define AB8500_INT_CH_WD_EXP 21 -#define AB8500_INT_VBUS_OVV 22 -#define AB8500_INT_MAIN_CH_DROP_END 23 -#define AB8500_INT_CCN_CONV_ACC 24 -#define AB8500_INT_INT_AUD 25 -#define AB8500_INT_CCEOC 26 -#define AB8500_INT_CC_INT_CALIB 27 -#define AB8500_INT_LOW_BAT_F 28 -#define AB8500_INT_LOW_BAT_R 29 -#define AB8500_INT_BUP_CHG_NOT_OK 30 -#define AB8500_INT_BUP_CHG_OK 31 -#define AB8500_INT_GP_HW_ADC_CONV_END 32 -#define AB8500_INT_ACC_DETECT_1DB_F 33 -#define AB8500_INT_ACC_DETECT_1DB_R 34 -#define AB8500_INT_ACC_DETECT_22DB_F 35 -#define AB8500_INT_ACC_DETECT_22DB_R 36 -#define AB8500_INT_ACC_DETECT_21DB_F 37 -#define AB8500_INT_ACC_DETECT_21DB_R 38 -#define AB8500_INT_GP_SW_ADC_CONV_END 39 -#define AB8500_INT_GPIO6R 40 -#define AB8500_INT_GPIO7R 41 -#define AB8500_INT_GPIO8R 42 -#define AB8500_INT_GPIO9R 43 -#define AB8500_INT_GPIO10R 44 -#define AB8500_INT_GPIO11R 45 -#define AB8500_INT_GPIO12R 46 -#define AB8500_INT_GPIO13R 47 -#define AB8500_INT_GPIO24R 48 -#define AB8500_INT_GPIO25R 49 -#define AB8500_INT_GPIO36R 50 -#define AB8500_INT_GPIO37R 51 -#define AB8500_INT_GPIO38R 52 -#define AB8500_INT_GPIO39R 53 -#define AB8500_INT_GPIO40R 54 -#define AB8500_INT_GPIO41R 55 -#define AB8500_INT_GPIO6F 56 -#define AB8500_INT_GPIO7F 57 -#define AB8500_INT_GPIO8F 58 -#define AB8500_INT_GPIO9F 59 -#define AB8500_INT_GPIO10F 60 -#define AB8500_INT_GPIO11F 61 -#define AB8500_INT_GPIO12F 62 -#define AB8500_INT_GPIO13F 63 -#define AB8500_INT_GPIO24F 64 -#define AB8500_INT_GPIO25F 65 -#define AB8500_INT_GPIO36F 66 -#define AB8500_INT_GPIO37F 67 -#define AB8500_INT_GPIO38F 68 -#define AB8500_INT_GPIO39F 69 -#define AB8500_INT_GPIO40F 70 -#define AB8500_INT_GPIO41F 71 -#define AB8500_INT_ADP_SOURCE_ERROR 72 -#define AB8500_INT_ADP_SINK_ERROR 73 -#define AB8500_INT_ADP_PROBE_PLUG 74 -#define AB8500_INT_ADP_PROBE_UNPLUG 75 -#define AB8500_INT_ADP_SENSE_OFF 76 -#define AB8500_INT_USB_PHY_POWER_ERR 78 -#define AB8500_INT_USB_LINK_STATUS 79 -#define AB8500_INT_BTEMP_LOW 80 -#define AB8500_INT_BTEMP_LOW_MEDIUM 81 -#define AB8500_INT_BTEMP_MEDIUM_HIGH 82 -#define AB8500_INT_BTEMP_HIGH 83 -#define AB8500_INT_USB_CHARGER_NOT_OK 89 -#define AB8500_INT_ID_WAKEUP_R 90 -#define AB8500_INT_ID_DET_R1R 92 -#define AB8500_INT_ID_DET_R2R 93 -#define AB8500_INT_ID_DET_R3R 94 -#define AB8500_INT_ID_DET_R4R 95 -#define AB8500_INT_ID_WAKEUP_F 96 -#define AB8500_INT_ID_DET_R1F 98 -#define AB8500_INT_ID_DET_R2F 99 -#define AB8500_INT_ID_DET_R3F 100 -#define AB8500_INT_ID_DET_R4F 101 -#define AB8500_INT_USB_CHG_DET_DONE 102 -#define AB8500_INT_USB_CH_TH_PROT_F 104 -#define AB8500_INT_USB_CH_TH_PROT_R 105 -#define AB8500_INT_MAIN_CH_TH_PROT_F 106 -#define AB8500_INT_MAIN_CH_TH_PROT_R 107 -#define AB8500_INT_USB_CHARGER_NOT_OKF 111 - -#define AB8500_NR_IRQS 112 -#define AB8500_NUM_IRQ_REGS 14 - -/** - * struct ab8500 - ab8500 internal structure - * @dev: parent device - * @lock: read/write operations lock - * @irq_lock: genirq bus lock - * @irq: irq line - * @chip_id: chip revision id - * @write: register write - * @read: register read - * @rx_buf: rx buf for SPI - * @tx_buf: tx buf for SPI - * @mask: cache of IRQ regs for bus lock - * @oldmask: cache of previous IRQ regs for bus lock - */ -struct ab8500 { - struct device *dev; - struct mutex lock; - struct mutex irq_lock; - - int irq_base; - int irq; - u8 chip_id; - - int (*write) (struct ab8500 *a8500, u16 addr, u8 data); - int (*read) (struct ab8500 *a8500, u16 addr); - - unsigned long tx_buf[4]; - unsigned long rx_buf[4]; - - u8 mask[AB8500_NUM_IRQ_REGS]; - u8 oldmask[AB8500_NUM_IRQ_REGS]; -}; - -struct regulator_reg_init; -struct regulator_init_data; -struct ab8500_gpio_platform_data; - -/** - * struct ab8500_platform_data - AB8500 platform data - * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used - * @init: board-specific initialization after detection of ab8500 - * @num_regulator_reg_init: number of regulator init registers - * @regulator_reg_init: regulator init registers - * @num_regulator: number of regulators - * @regulator: machine-specific constraints for regulators - */ -struct ab8500_platform_data { - int irq_base; - void (*init) (struct ab8500 *); - int num_regulator_reg_init; - struct ab8500_regulator_reg_init *regulator_reg_init; - int num_regulator; - struct regulator_init_data *regulator; - struct ab8500_gpio_platform_data *gpio; -}; - -extern int __devinit ab8500_init(struct ab8500 *ab8500); -extern int __devexit ab8500_exit(struct ab8500 *ab8500); - -#endif /* MFD_AB8500_H */ diff --git a/include/linux/mfd/ab8500/gpadc.h b/include/linux/mfd/ab8500/gpadc.h deleted file mode 100644 index 252966769d93..000000000000 --- a/include/linux/mfd/ab8500/gpadc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2010 ST-Ericsson SA - * Licensed under GPLv2. - * - * Author: Arun R Murthy - * Author: Daniel Willerud - */ - -#ifndef _AB8500_GPADC_H -#define _AB8500_GPADC_H - -/* GPADC source: From datasheet(ADCSwSel[4:0] in GPADCCtrl2) */ -#define BAT_CTRL 0x01 -#define BTEMP_BALL 0x02 -#define MAIN_CHARGER_V 0x03 -#define ACC_DETECT1 0x04 -#define ACC_DETECT2 0x05 -#define ADC_AUX1 0x06 -#define ADC_AUX2 0x07 -#define MAIN_BAT_V 0x08 -#define VBUS_V 0x09 -#define MAIN_CHARGER_C 0x0A -#define USB_CHARGER_C 0x0B -#define BK_BAT_V 0x0C -#define DIE_TEMP 0x0D - -struct ab8500_gpadc; - -struct ab8500_gpadc *ab8500_gpadc_get(char *name); -int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel); -int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel); -int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, - u8 channel, int ad_value); - -#endif /* _AB8500_GPADC_H */ diff --git a/include/linux/mfd/ab8500/gpio.h b/include/linux/mfd/ab8500/gpio.h deleted file mode 100644 index 488a8c920a29..000000000000 --- a/include/linux/mfd/ab8500/gpio.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright ST-Ericsson 2010. - * - * Author: Bibek Basu - * Licensed under GPLv2. - */ - -#ifndef _AB8500_GPIO_H -#define _AB8500_GPIO_H - -/* - * Platform data to register a block: only the initial gpio/irq number. - */ - -struct ab8500_gpio_platform_data { - int gpio_base; - u32 irq_base; - u8 config_reg[7]; -}; - -#endif /* _AB8500_GPIO_H */ diff --git a/include/linux/mfd/ab8500/sysctrl.h b/include/linux/mfd/ab8500/sysctrl.h deleted file mode 100644 index 10da0291f8f8..000000000000 --- a/include/linux/mfd/ab8500/sysctrl.h +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * Author: Mattias Nilsson for ST Ericsson. - * License terms: GNU General Public License (GPL) version 2 - */ -#ifndef __AB8500_SYSCTRL_H -#define __AB8500_SYSCTRL_H - -#include - -#ifdef CONFIG_AB8500_CORE - -int ab8500_sysctrl_read(u16 reg, u8 *value); -int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value); - -#else - -static inline int ab8500_sysctrl_read(u16 reg, u8 *value) -{ - return 0; -} - -static inline int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value) -{ - return 0; -} - -#endif /* CONFIG_AB8500_CORE */ - -static inline int ab8500_sysctrl_set(u16 reg, u8 bits) -{ - return ab8500_sysctrl_write(reg, bits, bits); -} - -static inline int ab8500_sysctrl_clear(u16 reg, u8 bits) -{ - return ab8500_sysctrl_write(reg, bits, 0); -} - -/* Registers */ -#define AB8500_TURNONSTATUS 0x100 -#define AB8500_RESETSTATUS 0x101 -#define AB8500_PONKEY1PRESSSTATUS 0x102 -#define AB8500_SYSCLKREQSTATUS 0x142 -#define AB8500_STW4500CTRL1 0x180 -#define AB8500_STW4500CTRL2 0x181 -#define AB8500_STW4500CTRL3 0x200 -#define AB8500_MAINWDOGCTRL 0x201 -#define AB8500_MAINWDOGTIMER 0x202 -#define AB8500_LOWBAT 0x203 -#define AB8500_BATTOK 0x204 -#define AB8500_SYSCLKTIMER 0x205 -#define AB8500_SMPSCLKCTRL 0x206 -#define AB8500_SMPSCLKSEL1 0x207 -#define AB8500_SMPSCLKSEL2 0x208 -#define AB8500_SMPSCLKSEL3 0x209 -#define AB8500_SYSULPCLKCONF 0x20A -#define AB8500_SYSULPCLKCTRL1 0x20B -#define AB8500_SYSCLKCTRL 0x20C -#define AB8500_SYSCLKREQ1VALID 0x20D -#define AB8500_SYSTEMCTRLSUP 0x20F -#define AB8500_SYSCLKREQ1RFCLKBUF 0x210 -#define AB8500_SYSCLKREQ2RFCLKBUF 0x211 -#define AB8500_SYSCLKREQ3RFCLKBUF 0x212 -#define AB8500_SYSCLKREQ4RFCLKBUF 0x213 -#define AB8500_SYSCLKREQ5RFCLKBUF 0x214 -#define AB8500_SYSCLKREQ6RFCLKBUF 0x215 -#define AB8500_SYSCLKREQ7RFCLKBUF 0x216 -#define AB8500_SYSCLKREQ8RFCLKBUF 0x217 -#define AB8500_DITHERCLKCTRL 0x220 -#define AB8500_SWATCTRL 0x230 -#define AB8500_HIQCLKCTRL 0x232 -#define AB8500_VSIMSYSCLKCTRL 0x233 - -/* Bits */ -#define AB8500_TURNONSTATUS_PORNVBAT BIT(0) -#define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1) -#define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2) -#define AB8500_TURNONSTATUS_RTCALARM BIT(3) -#define AB8500_TURNONSTATUS_MAINCHDET BIT(4) -#define AB8500_TURNONSTATUS_VBUSDET BIT(5) -#define AB8500_TURNONSTATUS_USBIDDETECT BIT(6) - -#define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0) -#define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2) - -#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_MASK 0x7F -#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_SHIFT 0 - -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6) -#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7) - -#define AB8500_STW4500CTRL1_SWOFF BIT(0) -#define AB8500_STW4500CTRL1_SWRESET4500N BIT(1) -#define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2) - -#define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0) -#define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1) -#define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2) -#define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3) -#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4) -#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5) -#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6) -#define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7) - -#define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0) -#define AB8500_STW4500CTRL3_RESETAUDN BIT(1) -#define AB8500_STW4500CTRL3_RESETDENCN BIT(2) -#define AB8500_STW4500CTRL3_THSDENA BIT(3) - -#define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0) -#define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1) -#define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4) - -#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_MASK 0x7F -#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_SHIFT 0 - -#define AB8500_LOWBAT_LOWBATENA BIT(0) -#define AB8500_LOWBAT_LOWBAT_MASK 0x7E -#define AB8500_LOWBAT_LOWBAT_SHIFT 1 - -#define AB8500_BATTOK_BATTOKSEL0THF_MASK 0x0F -#define AB8500_BATTOK_BATTOKSEL0THF_SHIFT 0 -#define AB8500_BATTOK_BATTOKSEL1THF_MASK 0xF0 -#define AB8500_BATTOK_BATTOKSEL1THF_SHIFT 4 - -#define AB8500_SYSCLKTIMER_SYSCLKTIMER_MASK 0x0F -#define AB8500_SYSCLKTIMER_SYSCLKTIMER_SHIFT 0 -#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_MASK 0xF0 -#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_SHIFT 4 - -#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_MASK 0x03 -#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_SHIFT 0 -#define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2) - -#define AB8500_SMPSCLKSEL1_VARMCLKSEL_MASK 0x07 -#define AB8500_SMPSCLKSEL1_VARMCLKSEL_SHIFT 0 -#define AB8500_SMPSCLKSEL1_VAPECLKSEL_MASK 0x38 -#define AB8500_SMPSCLKSEL1_VAPECLKSEL_SHIFT 3 - -#define AB8500_SMPSCLKSEL2_VMODCLKSEL_MASK 0x07 -#define AB8500_SMPSCLKSEL2_VMODCLKSEL_SHIFT 0 -#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_MASK 0x38 -#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_SHIFT 3 - -#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_MASK 0x07 -#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_SHIFT 0 -#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_MASK 0x38 -#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_SHIFT 3 - -#define AB8500_SYSULPCLKCONF_ULPCLKCONF_MASK 0x03 -#define AB8500_SYSULPCLKCONF_ULPCLKCONF_SHIFT 0 -#define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2) -#define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3) -#define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4) -#define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5) -#define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6) -#define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7) - -#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK 0x03 -#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT 0 -#define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2) -#define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3) -#define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4) -#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5) -#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6) -#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7) - -#define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0) -#define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1) -#define AB8500_SYSCLKCTRL_USBCLKENA BIT(2) - -#define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0) -#define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1) -#define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2) - -#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_MASK 0x03 -#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_SHIFT 0 -#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_MASK 0x0C -#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_SHIFT 2 -#define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4) - -#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4) - -#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2) -#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3) -#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4) - -#define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0) -#define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1) -#define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2) -#define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3) -#define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4) -#define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5) -#define AB8500_DITHERCLKCTRL_DITHERDEL_MASK 0xC0 -#define AB8500_DITHERCLKCTRL_DITHERDEL_SHIFT 6 - -#define AB8500_SWATCTRL_UPDATERF BIT(0) -#define AB8500_SWATCTRL_SWATENABLE BIT(1) -#define AB8500_SWATCTRL_RFOFFTIMER_MASK 0x1C -#define AB8500_SWATCTRL_RFOFFTIMER_SHIFT 2 -#define AB8500_SWATCTRL_SWATBIT5 BIT(6) - -#define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0) -#define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1) -#define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2) -#define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3) -#define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4) -#define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5) -#define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6) -#define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7) - -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6) -#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7) - -#endif /* __AB8500_SYSCTRL_H */ diff --git a/include/linux/mfd/abx500/ab5500.h b/include/linux/mfd/abx500/ab5500.h new file mode 100644 index 000000000000..a720051ae933 --- /dev/null +++ b/include/linux/mfd/abx500/ab5500.h @@ -0,0 +1,140 @@ +/* + * Copyright (C) ST-Ericsson 2011 + * + * License Terms: GNU General Public License v2 + */ +#ifndef MFD_AB5500_H +#define MFD_AB5500_H + +#include + +enum ab5500_devid { + AB5500_DEVID_ADC, + AB5500_DEVID_LEDS, + AB5500_DEVID_POWER, + AB5500_DEVID_REGULATORS, + AB5500_DEVID_SIM, + AB5500_DEVID_RTC, + AB5500_DEVID_CHARGER, + AB5500_DEVID_FUELGAUGE, + AB5500_DEVID_VIBRATOR, + AB5500_DEVID_CODEC, + AB5500_DEVID_USB, + AB5500_DEVID_OTP, + AB5500_DEVID_VIDEO, + AB5500_DEVID_DBIECI, + AB5500_DEVID_ONSWA, + AB5500_NUM_DEVICES, +}; + +enum ab5500_banks { + AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP = 0, + AB5500_BANK_VDDDIG_IO_I2C_CLK_TST = 1, + AB5500_BANK_VDENC = 2, + AB5500_BANK_SIM_USBSIM = 3, + AB5500_BANK_LED = 4, + AB5500_BANK_ADC = 5, + AB5500_BANK_RTC = 6, + AB5500_BANK_STARTUP = 7, + AB5500_BANK_DBI_ECI = 8, + AB5500_BANK_CHG = 9, + AB5500_BANK_FG_BATTCOM_ACC = 10, + AB5500_BANK_USB = 11, + AB5500_BANK_IT = 12, + AB5500_BANK_VIBRA = 13, + AB5500_BANK_AUDIO_HEADSETUSB = 14, + AB5500_NUM_BANKS = 15, +}; + +enum ab5500_banks_addr { + AB5500_ADDR_VIT_IO_I2C_CLK_TST_OTP = 0x4A, + AB5500_ADDR_VDDDIG_IO_I2C_CLK_TST = 0x4B, + AB5500_ADDR_VDENC = 0x06, + AB5500_ADDR_SIM_USBSIM = 0x04, + AB5500_ADDR_LED = 0x10, + AB5500_ADDR_ADC = 0x0A, + AB5500_ADDR_RTC = 0x0F, + AB5500_ADDR_STARTUP = 0x03, + AB5500_ADDR_DBI_ECI = 0x07, + AB5500_ADDR_CHG = 0x0B, + AB5500_ADDR_FG_BATTCOM_ACC = 0x0C, + AB5500_ADDR_USB = 0x05, + AB5500_ADDR_IT = 0x0E, + AB5500_ADDR_VIBRA = 0x02, + AB5500_ADDR_AUDIO_HEADSETUSB = 0x0D, +}; + +/* + * Interrupt register offsets + * Bank : 0x0E + */ +#define AB5500_IT_SOURCE0_REG 0x20 +#define AB5500_IT_SOURCE1_REG 0x21 +#define AB5500_IT_SOURCE2_REG 0x22 +#define AB5500_IT_SOURCE3_REG 0x23 +#define AB5500_IT_SOURCE4_REG 0x24 +#define AB5500_IT_SOURCE5_REG 0x25 +#define AB5500_IT_SOURCE6_REG 0x26 +#define AB5500_IT_SOURCE7_REG 0x27 +#define AB5500_IT_SOURCE8_REG 0x28 +#define AB5500_IT_SOURCE9_REG 0x29 +#define AB5500_IT_SOURCE10_REG 0x2A +#define AB5500_IT_SOURCE11_REG 0x2B +#define AB5500_IT_SOURCE12_REG 0x2C +#define AB5500_IT_SOURCE13_REG 0x2D +#define AB5500_IT_SOURCE14_REG 0x2E +#define AB5500_IT_SOURCE15_REG 0x2F +#define AB5500_IT_SOURCE16_REG 0x30 +#define AB5500_IT_SOURCE17_REG 0x31 +#define AB5500_IT_SOURCE18_REG 0x32 +#define AB5500_IT_SOURCE19_REG 0x33 +#define AB5500_IT_SOURCE20_REG 0x34 +#define AB5500_IT_SOURCE21_REG 0x35 +#define AB5500_IT_SOURCE22_REG 0x36 +#define AB5500_IT_SOURCE23_REG 0x37 + +#define AB5500_NUM_IRQ_REGS 23 + +/** + * struct ab5500 + * @access_mutex: lock out concurrent accesses to the AB registers + * @dev: a pointer to the device struct for this chip driver + * @ab5500_irq: the analog baseband irq + * @irq_base: the platform configuration irq base for subdevices + * @chip_name: name of this chip variant + * @chip_id: 8 bit chip ID for this chip variant + * @irq_lock: a lock to protect the mask + * @abb_events: a local bit mask of the prcmu wakeup events + * @event_mask: a local copy of the mask event registers + * @last_event_mask: a copy of the last event_mask written to hardware + * @startup_events: a copy of the first reading of the event registers + * @startup_events_read: whether the first events have been read + */ +struct ab5500 { + struct mutex access_mutex; + struct device *dev; + unsigned int ab5500_irq; + unsigned int irq_base; + char chip_name[32]; + u8 chip_id; + struct mutex irq_lock; + u32 abb_events; + u8 mask[AB5500_NUM_IRQ_REGS]; + u8 oldmask[AB5500_NUM_IRQ_REGS]; + u8 startup_events[AB5500_NUM_IRQ_REGS]; + bool startup_events_read; +#ifdef CONFIG_DEBUG_FS + unsigned int debug_bank; + unsigned int debug_address; +#endif +}; + +struct ab5500_platform_data { + struct {unsigned int base; unsigned int count; } irq; + void *dev_data[AB5500_NUM_DEVICES]; + struct abx500_init_settings *init_settings; + unsigned int init_settings_sz; + bool pm_power_off; +}; + +#endif /* MFD_AB5500_H */ diff --git a/include/linux/mfd/abx500/ab8500-gpadc.h b/include/linux/mfd/abx500/ab8500-gpadc.h new file mode 100644 index 000000000000..252966769d93 --- /dev/null +++ b/include/linux/mfd/abx500/ab8500-gpadc.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2010 ST-Ericsson SA + * Licensed under GPLv2. + * + * Author: Arun R Murthy + * Author: Daniel Willerud + */ + +#ifndef _AB8500_GPADC_H +#define _AB8500_GPADC_H + +/* GPADC source: From datasheet(ADCSwSel[4:0] in GPADCCtrl2) */ +#define BAT_CTRL 0x01 +#define BTEMP_BALL 0x02 +#define MAIN_CHARGER_V 0x03 +#define ACC_DETECT1 0x04 +#define ACC_DETECT2 0x05 +#define ADC_AUX1 0x06 +#define ADC_AUX2 0x07 +#define MAIN_BAT_V 0x08 +#define VBUS_V 0x09 +#define MAIN_CHARGER_C 0x0A +#define USB_CHARGER_C 0x0B +#define BK_BAT_V 0x0C +#define DIE_TEMP 0x0D + +struct ab8500_gpadc; + +struct ab8500_gpadc *ab8500_gpadc_get(char *name); +int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel); +int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel); +int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, + u8 channel, int ad_value); + +#endif /* _AB8500_GPADC_H */ diff --git a/include/linux/mfd/abx500/ab8500-gpio.h b/include/linux/mfd/abx500/ab8500-gpio.h new file mode 100644 index 000000000000..488a8c920a29 --- /dev/null +++ b/include/linux/mfd/abx500/ab8500-gpio.h @@ -0,0 +1,21 @@ +/* + * Copyright ST-Ericsson 2010. + * + * Author: Bibek Basu + * Licensed under GPLv2. + */ + +#ifndef _AB8500_GPIO_H +#define _AB8500_GPIO_H + +/* + * Platform data to register a block: only the initial gpio/irq number. + */ + +struct ab8500_gpio_platform_data { + int gpio_base; + u32 irq_base; + u8 config_reg[7]; +}; + +#endif /* _AB8500_GPIO_H */ diff --git a/include/linux/mfd/abx500/ab8500-sysctrl.h b/include/linux/mfd/abx500/ab8500-sysctrl.h new file mode 100644 index 000000000000..10da0291f8f8 --- /dev/null +++ b/include/linux/mfd/abx500/ab8500-sysctrl.h @@ -0,0 +1,254 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * Author: Mattias Nilsson for ST Ericsson. + * License terms: GNU General Public License (GPL) version 2 + */ +#ifndef __AB8500_SYSCTRL_H +#define __AB8500_SYSCTRL_H + +#include + +#ifdef CONFIG_AB8500_CORE + +int ab8500_sysctrl_read(u16 reg, u8 *value); +int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value); + +#else + +static inline int ab8500_sysctrl_read(u16 reg, u8 *value) +{ + return 0; +} + +static inline int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value) +{ + return 0; +} + +#endif /* CONFIG_AB8500_CORE */ + +static inline int ab8500_sysctrl_set(u16 reg, u8 bits) +{ + return ab8500_sysctrl_write(reg, bits, bits); +} + +static inline int ab8500_sysctrl_clear(u16 reg, u8 bits) +{ + return ab8500_sysctrl_write(reg, bits, 0); +} + +/* Registers */ +#define AB8500_TURNONSTATUS 0x100 +#define AB8500_RESETSTATUS 0x101 +#define AB8500_PONKEY1PRESSSTATUS 0x102 +#define AB8500_SYSCLKREQSTATUS 0x142 +#define AB8500_STW4500CTRL1 0x180 +#define AB8500_STW4500CTRL2 0x181 +#define AB8500_STW4500CTRL3 0x200 +#define AB8500_MAINWDOGCTRL 0x201 +#define AB8500_MAINWDOGTIMER 0x202 +#define AB8500_LOWBAT 0x203 +#define AB8500_BATTOK 0x204 +#define AB8500_SYSCLKTIMER 0x205 +#define AB8500_SMPSCLKCTRL 0x206 +#define AB8500_SMPSCLKSEL1 0x207 +#define AB8500_SMPSCLKSEL2 0x208 +#define AB8500_SMPSCLKSEL3 0x209 +#define AB8500_SYSULPCLKCONF 0x20A +#define AB8500_SYSULPCLKCTRL1 0x20B +#define AB8500_SYSCLKCTRL 0x20C +#define AB8500_SYSCLKREQ1VALID 0x20D +#define AB8500_SYSTEMCTRLSUP 0x20F +#define AB8500_SYSCLKREQ1RFCLKBUF 0x210 +#define AB8500_SYSCLKREQ2RFCLKBUF 0x211 +#define AB8500_SYSCLKREQ3RFCLKBUF 0x212 +#define AB8500_SYSCLKREQ4RFCLKBUF 0x213 +#define AB8500_SYSCLKREQ5RFCLKBUF 0x214 +#define AB8500_SYSCLKREQ6RFCLKBUF 0x215 +#define AB8500_SYSCLKREQ7RFCLKBUF 0x216 +#define AB8500_SYSCLKREQ8RFCLKBUF 0x217 +#define AB8500_DITHERCLKCTRL 0x220 +#define AB8500_SWATCTRL 0x230 +#define AB8500_HIQCLKCTRL 0x232 +#define AB8500_VSIMSYSCLKCTRL 0x233 + +/* Bits */ +#define AB8500_TURNONSTATUS_PORNVBAT BIT(0) +#define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1) +#define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2) +#define AB8500_TURNONSTATUS_RTCALARM BIT(3) +#define AB8500_TURNONSTATUS_MAINCHDET BIT(4) +#define AB8500_TURNONSTATUS_VBUSDET BIT(5) +#define AB8500_TURNONSTATUS_USBIDDETECT BIT(6) + +#define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0) +#define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2) + +#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_MASK 0x7F +#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_SHIFT 0 + +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6) +#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7) + +#define AB8500_STW4500CTRL1_SWOFF BIT(0) +#define AB8500_STW4500CTRL1_SWRESET4500N BIT(1) +#define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2) + +#define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0) +#define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1) +#define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2) +#define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3) +#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4) +#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5) +#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6) +#define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7) + +#define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0) +#define AB8500_STW4500CTRL3_RESETAUDN BIT(1) +#define AB8500_STW4500CTRL3_RESETDENCN BIT(2) +#define AB8500_STW4500CTRL3_THSDENA BIT(3) + +#define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0) +#define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1) +#define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4) + +#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_MASK 0x7F +#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_SHIFT 0 + +#define AB8500_LOWBAT_LOWBATENA BIT(0) +#define AB8500_LOWBAT_LOWBAT_MASK 0x7E +#define AB8500_LOWBAT_LOWBAT_SHIFT 1 + +#define AB8500_BATTOK_BATTOKSEL0THF_MASK 0x0F +#define AB8500_BATTOK_BATTOKSEL0THF_SHIFT 0 +#define AB8500_BATTOK_BATTOKSEL1THF_MASK 0xF0 +#define AB8500_BATTOK_BATTOKSEL1THF_SHIFT 4 + +#define AB8500_SYSCLKTIMER_SYSCLKTIMER_MASK 0x0F +#define AB8500_SYSCLKTIMER_SYSCLKTIMER_SHIFT 0 +#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_MASK 0xF0 +#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_SHIFT 4 + +#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_MASK 0x03 +#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_SHIFT 0 +#define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2) + +#define AB8500_SMPSCLKSEL1_VARMCLKSEL_MASK 0x07 +#define AB8500_SMPSCLKSEL1_VARMCLKSEL_SHIFT 0 +#define AB8500_SMPSCLKSEL1_VAPECLKSEL_MASK 0x38 +#define AB8500_SMPSCLKSEL1_VAPECLKSEL_SHIFT 3 + +#define AB8500_SMPSCLKSEL2_VMODCLKSEL_MASK 0x07 +#define AB8500_SMPSCLKSEL2_VMODCLKSEL_SHIFT 0 +#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_MASK 0x38 +#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_SHIFT 3 + +#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_MASK 0x07 +#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_SHIFT 0 +#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_MASK 0x38 +#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_SHIFT 3 + +#define AB8500_SYSULPCLKCONF_ULPCLKCONF_MASK 0x03 +#define AB8500_SYSULPCLKCONF_ULPCLKCONF_SHIFT 0 +#define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2) +#define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3) +#define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4) +#define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5) +#define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6) +#define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7) + +#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK 0x03 +#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT 0 +#define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2) +#define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3) +#define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4) +#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5) +#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6) +#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7) + +#define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0) +#define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1) +#define AB8500_SYSCLKCTRL_USBCLKENA BIT(2) + +#define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0) +#define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1) +#define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2) + +#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_MASK 0x03 +#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_SHIFT 0 +#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_MASK 0x0C +#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_SHIFT 2 +#define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4) + +#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4) + +#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2) +#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3) +#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4) + +#define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0) +#define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1) +#define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2) +#define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3) +#define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4) +#define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5) +#define AB8500_DITHERCLKCTRL_DITHERDEL_MASK 0xC0 +#define AB8500_DITHERCLKCTRL_DITHERDEL_SHIFT 6 + +#define AB8500_SWATCTRL_UPDATERF BIT(0) +#define AB8500_SWATCTRL_SWATENABLE BIT(1) +#define AB8500_SWATCTRL_RFOFFTIMER_MASK 0x1C +#define AB8500_SWATCTRL_RFOFFTIMER_SHIFT 2 +#define AB8500_SWATCTRL_SWATBIT5 BIT(6) + +#define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0) +#define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1) +#define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2) +#define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3) +#define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4) +#define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5) +#define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6) +#define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7) + +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6) +#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7) + +#endif /* __AB8500_SYSCTRL_H */ diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h new file mode 100644 index 000000000000..838c6b487cc5 --- /dev/null +++ b/include/linux/mfd/abx500/ab8500.h @@ -0,0 +1,201 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * License Terms: GNU General Public License v2 + * Author: Srinidhi Kasagar + */ +#ifndef MFD_AB8500_H +#define MFD_AB8500_H + +#include + +/* + * AB8500 bank addresses + */ +#define AB8500_SYS_CTRL1_BLOCK 0x1 +#define AB8500_SYS_CTRL2_BLOCK 0x2 +#define AB8500_REGU_CTRL1 0x3 +#define AB8500_REGU_CTRL2 0x4 +#define AB8500_USB 0x5 +#define AB8500_TVOUT 0x6 +#define AB8500_DBI 0x7 +#define AB8500_ECI_AV_ACC 0x8 +#define AB8500_RESERVED 0x9 +#define AB8500_GPADC 0xA +#define AB8500_CHARGER 0xB +#define AB8500_GAS_GAUGE 0xC +#define AB8500_AUDIO 0xD +#define AB8500_INTERRUPT 0xE +#define AB8500_RTC 0xF +#define AB8500_MISC 0x10 +#define AB8500_DEVELOPMENT 0x11 +#define AB8500_DEBUG 0x12 +#define AB8500_PROD_TEST 0x13 +#define AB8500_OTP_EMUL 0x15 + +/* + * Interrupts + */ + +#define AB8500_INT_MAIN_EXT_CH_NOT_OK 0 +#define AB8500_INT_UN_PLUG_TV_DET 1 +#define AB8500_INT_PLUG_TV_DET 2 +#define AB8500_INT_TEMP_WARM 3 +#define AB8500_INT_PON_KEY2DB_F 4 +#define AB8500_INT_PON_KEY2DB_R 5 +#define AB8500_INT_PON_KEY1DB_F 6 +#define AB8500_INT_PON_KEY1DB_R 7 +#define AB8500_INT_BATT_OVV 8 +#define AB8500_INT_MAIN_CH_UNPLUG_DET 10 +#define AB8500_INT_MAIN_CH_PLUG_DET 11 +#define AB8500_INT_USB_ID_DET_F 12 +#define AB8500_INT_USB_ID_DET_R 13 +#define AB8500_INT_VBUS_DET_F 14 +#define AB8500_INT_VBUS_DET_R 15 +#define AB8500_INT_VBUS_CH_DROP_END 16 +#define AB8500_INT_RTC_60S 17 +#define AB8500_INT_RTC_ALARM 18 +#define AB8500_INT_BAT_CTRL_INDB 20 +#define AB8500_INT_CH_WD_EXP 21 +#define AB8500_INT_VBUS_OVV 22 +#define AB8500_INT_MAIN_CH_DROP_END 23 +#define AB8500_INT_CCN_CONV_ACC 24 +#define AB8500_INT_INT_AUD 25 +#define AB8500_INT_CCEOC 26 +#define AB8500_INT_CC_INT_CALIB 27 +#define AB8500_INT_LOW_BAT_F 28 +#define AB8500_INT_LOW_BAT_R 29 +#define AB8500_INT_BUP_CHG_NOT_OK 30 +#define AB8500_INT_BUP_CHG_OK 31 +#define AB8500_INT_GP_HW_ADC_CONV_END 32 +#define AB8500_INT_ACC_DETECT_1DB_F 33 +#define AB8500_INT_ACC_DETECT_1DB_R 34 +#define AB8500_INT_ACC_DETECT_22DB_F 35 +#define AB8500_INT_ACC_DETECT_22DB_R 36 +#define AB8500_INT_ACC_DETECT_21DB_F 37 +#define AB8500_INT_ACC_DETECT_21DB_R 38 +#define AB8500_INT_GP_SW_ADC_CONV_END 39 +#define AB8500_INT_GPIO6R 40 +#define AB8500_INT_GPIO7R 41 +#define AB8500_INT_GPIO8R 42 +#define AB8500_INT_GPIO9R 43 +#define AB8500_INT_GPIO10R 44 +#define AB8500_INT_GPIO11R 45 +#define AB8500_INT_GPIO12R 46 +#define AB8500_INT_GPIO13R 47 +#define AB8500_INT_GPIO24R 48 +#define AB8500_INT_GPIO25R 49 +#define AB8500_INT_GPIO36R 50 +#define AB8500_INT_GPIO37R 51 +#define AB8500_INT_GPIO38R 52 +#define AB8500_INT_GPIO39R 53 +#define AB8500_INT_GPIO40R 54 +#define AB8500_INT_GPIO41R 55 +#define AB8500_INT_GPIO6F 56 +#define AB8500_INT_GPIO7F 57 +#define AB8500_INT_GPIO8F 58 +#define AB8500_INT_GPIO9F 59 +#define AB8500_INT_GPIO10F 60 +#define AB8500_INT_GPIO11F 61 +#define AB8500_INT_GPIO12F 62 +#define AB8500_INT_GPIO13F 63 +#define AB8500_INT_GPIO24F 64 +#define AB8500_INT_GPIO25F 65 +#define AB8500_INT_GPIO36F 66 +#define AB8500_INT_GPIO37F 67 +#define AB8500_INT_GPIO38F 68 +#define AB8500_INT_GPIO39F 69 +#define AB8500_INT_GPIO40F 70 +#define AB8500_INT_GPIO41F 71 +#define AB8500_INT_ADP_SOURCE_ERROR 72 +#define AB8500_INT_ADP_SINK_ERROR 73 +#define AB8500_INT_ADP_PROBE_PLUG 74 +#define AB8500_INT_ADP_PROBE_UNPLUG 75 +#define AB8500_INT_ADP_SENSE_OFF 76 +#define AB8500_INT_USB_PHY_POWER_ERR 78 +#define AB8500_INT_USB_LINK_STATUS 79 +#define AB8500_INT_BTEMP_LOW 80 +#define AB8500_INT_BTEMP_LOW_MEDIUM 81 +#define AB8500_INT_BTEMP_MEDIUM_HIGH 82 +#define AB8500_INT_BTEMP_HIGH 83 +#define AB8500_INT_USB_CHARGER_NOT_OK 89 +#define AB8500_INT_ID_WAKEUP_R 90 +#define AB8500_INT_ID_DET_R1R 92 +#define AB8500_INT_ID_DET_R2R 93 +#define AB8500_INT_ID_DET_R3R 94 +#define AB8500_INT_ID_DET_R4R 95 +#define AB8500_INT_ID_WAKEUP_F 96 +#define AB8500_INT_ID_DET_R1F 98 +#define AB8500_INT_ID_DET_R2F 99 +#define AB8500_INT_ID_DET_R3F 100 +#define AB8500_INT_ID_DET_R4F 101 +#define AB8500_INT_USB_CHG_DET_DONE 102 +#define AB8500_INT_USB_CH_TH_PROT_F 104 +#define AB8500_INT_USB_CH_TH_PROT_R 105 +#define AB8500_INT_MAIN_CH_TH_PROT_F 106 +#define AB8500_INT_MAIN_CH_TH_PROT_R 107 +#define AB8500_INT_USB_CHARGER_NOT_OKF 111 + +#define AB8500_NR_IRQS 112 +#define AB8500_NUM_IRQ_REGS 14 + +/** + * struct ab8500 - ab8500 internal structure + * @dev: parent device + * @lock: read/write operations lock + * @irq_lock: genirq bus lock + * @irq: irq line + * @chip_id: chip revision id + * @write: register write + * @read: register read + * @rx_buf: rx buf for SPI + * @tx_buf: tx buf for SPI + * @mask: cache of IRQ regs for bus lock + * @oldmask: cache of previous IRQ regs for bus lock + */ +struct ab8500 { + struct device *dev; + struct mutex lock; + struct mutex irq_lock; + + int irq_base; + int irq; + u8 chip_id; + + int (*write) (struct ab8500 *a8500, u16 addr, u8 data); + int (*read) (struct ab8500 *a8500, u16 addr); + + unsigned long tx_buf[4]; + unsigned long rx_buf[4]; + + u8 mask[AB8500_NUM_IRQ_REGS]; + u8 oldmask[AB8500_NUM_IRQ_REGS]; +}; + +struct regulator_reg_init; +struct regulator_init_data; +struct ab8500_gpio_platform_data; + +/** + * struct ab8500_platform_data - AB8500 platform data + * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used + * @init: board-specific initialization after detection of ab8500 + * @num_regulator_reg_init: number of regulator init registers + * @regulator_reg_init: regulator init registers + * @num_regulator: number of regulators + * @regulator: machine-specific constraints for regulators + */ +struct ab8500_platform_data { + int irq_base; + void (*init) (struct ab8500 *); + int num_regulator_reg_init; + struct ab8500_regulator_reg_init *regulator_reg_init; + int num_regulator; + struct regulator_init_data *regulator; + struct ab8500_gpio_platform_data *gpio; +}; + +extern int __devinit ab8500_init(struct ab8500 *ab8500); +extern int __devexit ab8500_exit(struct ab8500 *ab8500); + +#endif /* MFD_AB8500_H */ -- cgit v1.2.3 From 71e58782d2e054798f91473f5452ffe65e2a5ff8 Mon Sep 17 00:00:00 2001 From: Donggeun Kim Date: Thu, 15 Dec 2011 18:20:47 +0900 Subject: misc: Remove max8997-muic sysfs attributes The 'switch' sysfs attribute is used for showing and setting the switch state of the device. However, setting it from the userspace focibly is not appropriate. And showing the state can be handled from other places (e.g. external connector) in a unified manner. This patch removes the sysfs attribute. Plus, uevent messages for interrupts are also removed. The initial max8997-muic driver is merged at: git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6.git for-next Signed-off-by: Donggeun Kim Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park Acked-by: Greg Kroah-Hartman Signed-off-by: Samuel Ortiz --- drivers/misc/max8997-muic.c | 137 ++------------------------------------------ 1 file changed, 4 insertions(+), 133 deletions(-) (limited to 'drivers/misc') diff --git a/drivers/misc/max8997-muic.c b/drivers/misc/max8997-muic.c index 74a9448a93d2..d74ef41aabd5 100644 --- a/drivers/misc/max8997-muic.c +++ b/drivers/misc/max8997-muic.c @@ -307,11 +307,8 @@ static void max8997_muic_irq_work(struct work_struct *work) struct max8997_muic_info, irq_work); struct max8997_platform_data *pdata = dev_get_platdata(info->iodev->dev); - char env_name_str[30], env_state_str[15]; - char *envp[] = { env_name_str, env_state_str, NULL }; u8 status[3]; - u8 adc, adc_low, adc_err; - u8 vb_volt, db_chg, dcd_tmr, cdr, chg_type, ovp; + u8 adc, chg_type; int irq_type = info->irq - pdata->irq_base; int ret; @@ -330,72 +327,24 @@ static void max8997_muic_irq_work(struct work_struct *work) status[0], status[1]); switch (irq_type) { - case MAX8997_MUICIRQ_ADCError: - adc_err = status[0] & STATUS1_ADCERR_MASK; - adc_err >>= STATUS1_ADCERR_SHIFT; - sprintf(env_name_str, "IRQ=%s", "ADC_Error"); - sprintf(env_state_str, "STATE=%d", adc_err); - break; - case MAX8997_MUICIRQ_ADCLow: - adc_low = status[0] & STATUS1_ADCLOW_MASK; - adc_low >>= STATUS1_ADCLOW_SHIFT; - sprintf(env_name_str, "IRQ=%s", "ADC_Low"); - sprintf(env_state_str, "STATE=%d", adc_low); - break; case MAX8997_MUICIRQ_ADC: adc = status[0] & STATUS1_ADC_MASK; adc >>= STATUS1_ADC_SHIFT; max8997_muic_handle_adc(info, adc); - - sprintf(env_name_str, "IRQ=%s", "ADC"); - sprintf(env_state_str, "STATE=%d", adc); - break; - case MAX8997_MUICIRQ_VBVolt: - vb_volt = status[1] & STATUS2_VBVOLT_MASK; - vb_volt >>= STATUS2_VBVOLT_SHIFT; - sprintf(env_name_str, "IRQ=%s", "VB_Volt"); - sprintf(env_state_str, "STATE=%d", vb_volt); - break; - case MAX8997_MUICIRQ_DBChg: - db_chg = status[1] & STATUS2_DBCHG_MASK; - db_chg >>= STATUS2_DBCHG_SHIFT; - sprintf(env_name_str, "IRQ=%s", "DB_CHARGER"); - sprintf(env_state_str, "STATE=%d", db_chg); - break; - case MAX8997_MUICIRQ_DCDTmr: - dcd_tmr = status[1] & STATUS2_DCDTMR_MASK; - dcd_tmr >>= STATUS2_DCDTMR_SHIFT; - sprintf(env_name_str, "IRQ=%s", "DCD_TIMER"); - sprintf(env_state_str, "STATE=%d", dcd_tmr); - break; - case MAX8997_MUICIRQ_ChgDetRun: - cdr = status[1] & STATUS2_CHGDETRUN_MASK; - cdr >>= STATUS2_CHGDETRUN_SHIFT; - sprintf(env_name_str, "IRQ=%s", "CHG_DET_RUN"); - sprintf(env_state_str, "STATE=%d", cdr); break; case MAX8997_MUICIRQ_ChgTyp: chg_type = status[1] & STATUS2_CHGTYP_MASK; chg_type >>= STATUS2_CHGTYP_SHIFT; max8997_muic_handle_charger_type(info, chg_type); - - sprintf(env_name_str, "IRQ=%s", "CHARGER_TYPE"); - sprintf(env_state_str, "STATE=%d", chg_type); - break; - case MAX8997_MUICIRQ_OVP: - ovp = status[2] & STATUS3_OVP_MASK; - ovp >>= STATUS3_OVP_SHIFT; - sprintf(env_name_str, "IRQ=%s", "OVER-VOLTAGE"); - sprintf(env_state_str, "STATE=%d", ovp); break; default: + dev_info(info->dev, "misc interrupt: %s occurred\n", + muic_irqs[irq_type].name); break; } - kobject_uevent_env(&info->dev->kobj, KOBJ_CHANGE, envp); - mutex_unlock(&info->mutex); return; @@ -438,74 +387,6 @@ static void max8997_muic_detect_dev(struct max8997_muic_info *info) max8997_muic_handle_charger_type(info, chg_type); } -static ssize_t max8997_muic_show_manualsw(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct max8997_muic_info *info = dev_get_drvdata(dev); - int ret; - u8 value, manual_switch; - - ret = max8997_read_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, &value); - if (ret) { - dev_err(info->dev, "failed to read muic register\n"); - return sprintf(buf, "UNKNOWN\n"); - } - - manual_switch = value & (COMN1SW_MASK | COMP2SW_MASK); - - switch (manual_switch) { - case MAX8997_SW_USB: - return sprintf(buf, "USB\n"); - case MAX8997_SW_AUDIO: - return sprintf(buf, "AUDIO\n"); - case MAX8997_SW_UART: - return sprintf(buf, "UART\n"); - default: - return sprintf(buf, "OPEN\n"); - } -} - -static ssize_t max8997_muic_store_manualsw(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct max8997_muic_info *info = dev_get_drvdata(dev); - int ret; - u8 manual_switch; - - if (!strncmp(buf, "USB", 3)) { - manual_switch = MAX8997_SW_USB; - } else if (!strncmp(buf, "AUDIO", 5)) { - manual_switch = MAX8997_SW_AUDIO; - } else if (!strncmp(buf, "UART", 4)) { - manual_switch = MAX8997_SW_UART; - } else if (!strncmp(buf, "OPEN", 4)) { - manual_switch = MAX8997_SW_OPEN; - } else { - dev_err(info->dev, "invalid parameter\n"); - goto out; - } - - ret = max8997_update_reg(info->muic, MAX8997_MUIC_REG_CONTROL1, - manual_switch, SW_MASK); - if (ret) - dev_err(info->dev, "failed to update muic register\n"); -out: - return count; -} - -static DEVICE_ATTR(switch, S_IRUGO | S_IWUSR, - max8997_muic_show_manualsw, max8997_muic_store_manualsw); - -static struct attribute *max8997_muic_attributes[] = { - &dev_attr_switch.attr, - NULL -}; - -static const struct attribute_group max8997_muic_group = { - .attrs = max8997_muic_attributes, -}; - static void max8997_initialize_device(struct max8997_muic_info *info) { struct max8997_muic_platform_data *mdata = info->muic_pdata; @@ -545,13 +426,6 @@ static int __devinit max8997_muic_probe(struct platform_device *pdev) platform_set_drvdata(pdev, info); mutex_init(&info->mutex); - ret = sysfs_create_group(&pdev->dev.kobj, &max8997_muic_group); - if (ret) { - dev_err(&pdev->dev, - "failed to create max8997 muic attribute group\n"); - goto err_sysfs; - } - INIT_WORK(&info->irq_work, max8997_muic_irq_work); for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) { @@ -583,8 +457,6 @@ static int __devinit max8997_muic_probe(struct platform_device *pdev) return ret; err_irq: - sysfs_remove_group(&pdev->dev.kobj, &max8997_muic_group); -err_sysfs: err_pdata: kfree(info); err_kfree: @@ -598,10 +470,9 @@ static int __devexit max8997_muic_remove(struct platform_device *pdev) dev_get_platdata(info->iodev->dev); int i; - sysfs_remove_group(&pdev->dev.kobj, &max8997_muic_group); - for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) free_irq(pdata->irq_base + muic_irqs[i].irq, info); + cancel_work_sync(&info->irq_work); kfree(info); -- cgit v1.2.3