blob: 1f57c113df6dab5d6816b829d994958c1ad657e4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
menu "Host processor type and features"
source "arch/x86/Kconfig.cpu"
endmenu
config UML_X86
bool
default y
config X86_32
bool
default y
select HAVE_AOUT
config RWSEM_XCHGADD_ALGORITHM
def_bool y
config 64BIT
bool
default n
config 3_LEVEL_PGTABLES
bool "Three-level pagetables (EXPERIMENTAL)"
default n
depends on EXPERIMENTAL
help
Three-level pagetables will let UML have more than 4G of physical
memory. All the memory that can't be mapped directly will be treated
as high memory.
However, this it experimental on 32-bit architectures, so if unsure say
N (on x86-64 it's automatically enabled, instead, as it's safe there).
config ARCH_HAS_SC_SIGNALS
bool
default y
config ARCH_REUSE_HOST_VSYSCALL_AREA
bool
default y
config GENERIC_HWEIGHT
bool
default y
|
