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authorGilad Broner <gbroner@codeaurora.org>2015-01-22 14:50:01 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-22 10:58:35 -0700
commit4ad04d8bc587f53e654817caa206043f7eefb766 (patch)
tree9411ee1162ea2a6b04173c043b622c5f8b05af85 /Documentation
parent7ae3423485a7331debe766160c600d2ec58dffbc (diff)
scsi: ufs-qcom: change device reference clock control
As of HW major version 2, bit 'UFS_DEV_REF_CLK_EN' which is used to gate/ungate the ref_clk to external UFS device, was moved into the UFS register space to UFS_CFG1 register. This change adds support to appropriately control the device reference clock and it also adds the missing documentation for the device reference clock control register address space. Change-Id: I66a6a75dc5a1cf130b1cee90ae20f9f950edfb3a Signed-off-by: Gilad Broner <gbroner@codeaurora.org> [subhashj@codeaurora.org: resolved trivial merge conflicts] Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt4
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index b43cb9883db6..93ba9b9c9f0c 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -11,6 +11,8 @@ Required properties:
"qcom,ufshc"
- interrupts : <interrupt mapping for UFS host controller IRQ>
- reg : <registers mapping>
+ first entry should contain UFS host controller register address space (mandatory),
+ second entry is the device ref. clock control register map (optional).
Optional properties:
- phys : phandle to UFS PHY node
@@ -57,7 +59,7 @@ regulators or clocks are always on.
Example:
ufshc@0xfc598000 {
compatible = "jedec,ufs-1.1";
- reg = <0xfc598000 0x800>;
+ reg = <0xfc598000 0x800>, <0xfd512074 0x4>;
interrupts = <0 28 0>;
ufs-qcom-crypto = <&ufs_ice>;